<def f='src/src/sys/dev/pci/if_alereg.h' l='658' ll='715'/>
<size>16</size>
<doc f='src/src/sys/dev/pci/if_alereg.h' l='642'>/*
 * RRS(receive return status) structure.
 *
 * Note:
 * Atheros AR81xx does not support descriptor based DMA on Rx
 * instead it just prepends a Rx status structure prior to a
 * received frame which also resides on the same Rx buffer.
 * This means driver should copy an entire frame from the
 * buffer to new mbuf chain which in turn greatly increases CPU
 * cycles and effectively nullify the advantage of DMA
 * operation of controller. So you should have fast CPU to cope
 * with the copy operation. Implementing flow-controls may help
 * a lot to minimize Rx FIFO overflows but it&apos;s not available
 * yet on FreeBSD and hardware doesn&apos;t seem to support
 * fine-grained Tx/Rx flow controls.
 */</doc>
<mbr r='rx_rs::seqno' o='0' t='__uint32_t'/>
<mbr r='rx_rs::length' o='32' t='__uint32_t'/>
<mbr r='rx_rs::flags' o='64' t='__uint32_t'/>
<mbr r='rx_rs::vtags' o='96' t='__uint32_t'/>
