<def f='src/src/sys/dev/pci/pciide_piix_reg.h' l='111' ll='112' type='const __int8_t [5]'/>
<use f='src/src/sys/dev/pci/piixide.c' l='630' u='r' c='piix_setup_channel'/>
<use f='src/src/sys/dev/pci/piixide.c' l='638' u='r' c='piix_setup_channel'/>
<use f='src/src/sys/dev/pci/piixide.c' l='846' u='r' c='piix_setup_idetim_timings'/>
<use f='src/src/sys/dev/pci/piixide.c' l='876' u='r' c='piix_setup_idetim_drvs'/>
<use f='src/src/sys/dev/pci/piixide.c' l='914' u='r' c='piix_setup_sidetim_timings'/>
<doc f='src/src/sys/dev/pci/pciide_piix_reg.h' l='106'>/*
 * these tables define the differents values to upload to the
 * ISP and RTC registers for the various PIO and DMA mode
 * (from the PIIX4 doc).
 */</doc>
