<dec f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/clock.h' l='59' type='struct list_head'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_ctrl.c' l='94' u='a' c='nouveau_control_mthd_pstate_attr'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_ctrl.c' l='94' u='a' c='nouveau_control_mthd_pstate_attr'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_ctrl.c' l='94' u='a' c='nouveau_control_mthd_pstate_attr'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_ctrl.c' l='94' u='a' c='nouveau_control_mthd_pstate_attr'/>
<offset>128</offset>
<doc f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/clock.h' l='59'>/* c-states */</doc>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='92' u='a' c='nouveau_cstate_prog'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='93' u='m' c='nouveau_cstate_prog'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='93' u='m' c='nouveau_cstate_prog'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='93' u='m' c='nouveau_cstate_prog'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='167' u='a' c='nouveau_cstate_new'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='243' u='a' c='nouveau_pstate_info'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='243' u='a' c='nouveau_pstate_info'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='243' u='a' c='nouveau_pstate_info'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='243' u='a' c='nouveau_pstate_info'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='271' u='a' c='nouveau_pstate_del'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='271' u='a' c='nouveau_pstate_del'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='271' u='a' c='nouveau_pstate_del'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='271' u='a' c='nouveau_pstate_del'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='302' u='a' c='nouveau_pstate_new'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='423' u='a' c='_nouveau_clock_init'/>
