<dec f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h' l='1083' type='struct mutex'/>
<offset>1472</offset>
<doc f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h' l='1079'>/*
	 * Protects RPS/RC6 register access and PCU communication.
	 * Must be taken after struct_mutex if nested.
	 */</doc>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_dma.c' l='1874' u='a' c='i915_driver_load'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_dma.c' l='1994' u='a' c='i915_driver_unload'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='1134' u='a' c='gen6_pm_rps_work'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='1180' u='a' c='gen6_pm_rps_work'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='3609' u='a' c='hsw_enable_ips'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='3611' u='a' c='hsw_enable_ips'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='3639' u='a' c='hsw_disable_ips'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='3641' u='a' c='hsw_disable_ips'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='4250' u='a' c='valleyview_set_cdclk'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='4260' u='a' c='valleyview_set_cdclk'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6991' u='a' c='hsw_disable_lcpll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6994' u='a' c='hsw_disable_lcpll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='7050' u='a' c='hsw_restore_lcpll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='7053' u='a' c='hsw_restore_lcpll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='7144' u='a' c='hsw_disable_pc8'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='7146' u='a' c='hsw_disable_pc8'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3102' u='a' c='gen6_set_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3188' u='a' c='gen6_rps_idle'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3196' u='a' c='gen6_rps_idle'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3203' u='a' c='gen6_rps_boost'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3211' u='a' c='gen6_rps_boost'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3218' u='a' c='valleyview_set_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3395' u='a' c='gen6_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3525' u='a' c='gen6_update_ring_freq'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3696' u='a' c='valleyview_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='4543' u='a' c='intel_disable_gt_powersave'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='4549' u='a' c='intel_disable_gt_powersave'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='4560' u='a' c='intel_gen6_powersave_work'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='4572' u='a' c='intel_gen6_powersave_work'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='5142' u='a' c='valleyview_init_clock_gating'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='5144' u='a' c='valleyview_init_clock_gating'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='5536' u='a' c='vlv_set_power_well'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='5557' u='a' c='vlv_set_power_well'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='5590' u='a' c='vlv_power_well_enabled'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='5609' u='a' c='vlv_power_well_enabled'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='6186' u='a' c='sandybridge_pcode_read'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='6210' u='a' c='sandybridge_pcode_write'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='6280' u='a' c='intel_pm_setup'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_sideband.c' l='73' u='a' c='vlv_punit_read'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_sideband.c' l='85' u='a' c='vlv_punit_write'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_sideband.c' l='113' u='a' c='vlv_nc_read'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_uncore.c' l='431' u='a' c='intel_uncore_sanitize'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_uncore.c' l='439' u='a' c='intel_uncore_sanitize'/>
