<def f='src/src/sys/dev/ic/athvar.h' l='154' ll='166'/>
<size>64</size>
<doc f='src/src/sys/dev/ic/athvar.h' l='145'>/*
 * Data transmit queue state.  One of these exists for each
 * hardware transmit queue.  Packets sent to us from above
 * are assigned to queues based on their priority.  Not all
 * devices support a complete set of hardware transmit queues.
 * For those devices the array sc_ac2q will map multiple
 * priorities to fewer hardware queues (typically all to one
 * hardware queue).
 */</doc>
<mbr r='ath_txq::axq_qnum' o='0' t='u_int'/>
<mbr r='ath_txq::axq_depth' o='32' t='u_int'/>
<mbr r='ath_txq::axq_intrcnt' o='64' t='u_int'/>
<mbr r='ath_txq::axq_link' o='128' t='u_int32_t *'/>
<mbr r='ath_txq::axq_q' o='192' t='struct (anonymous struct at /home/joerg/work/NetBSD/clean/src/sys/dev/ic/athvar.h:159:2)'/>
<mbr r='ath_txq::axq_lock' o='320' t='ath_txq_lock_t'/>
<mbr r='ath_txq::axq_linkbuf' o='384' t='struct ath_buf *'/>
<mbr r='ath_txq::axq_timer' o='448' t='u_int'/>
