<dec f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212.h' l='534' type='HAL_BOOL ar5212PhyDisable(struct ath_hal * ah)'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212_attach.c' l='45'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212_attach.c' l='45'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212_attach.c' l='45'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212_attach.c' l='45'/>
<def f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212_reset.c' l='834' ll='838' type='HAL_BOOL ar5212PhyDisable(struct ath_hal * ah)'/>
<doc f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212_reset.c' l='828'>/*
 * Places the PHY and Radio chips into reset.  A full reset
 * must be called to leave this state.  The PCI/MAC/PCU are
 * not placed into reset as we must receive interrupt to
 * re-enable the hardware.
 */</doc>
