<dec f='src/src/sys/dev/ic/aic79xxvar.h' l='1224' type='u_int'/>
<use f='src/src/sys/dev/ic/aic79xx.c' l='8309' u='r' c='ahd_loadseq'/>
<offset>116288</offset>
<doc f='src/src/sys/dev/ic/aic79xxvar.h' l='1223'>/* PCI cacheline size. */</doc>
<use f='src/src/sys/dev/pci/ahd_pci.c' l='557' u='w' c='ahd_pci_attach'/>
<use f='src/src/sys/dev/pci/ahd_pci.c' l='558' u='w' c='ahd_pci_attach'/>
