<def f='src/src/sys/dev/ic/aic79xxvar.h' l='539' ll='545'/>
<size>8</size>
<doc f='src/src/sys/dev/ic/aic79xxvar.h' l='531'>/*
 * Definition of a scatter/gather element as transferred to the controller.
 * The aic7xxx chips only support a 24bit length.  We use the top byte of
 * the length to store additional address bits and a flag to indicate
 * that a given segment terminates the transfer.  This gives us an
 * addressable range of 512GB on machines with 64bit PCI or with chips
 * that can support dual address cycles on 32bit PCI busses.
 */</doc>
<mbr r='ahd_dma_seg::addr' o='0' t='__uint32_t'/>
<mbr r='ahd_dma_seg::len' o='32' t='__uint32_t'/>
