/* Autogenerated file, DO NOT EDIT manually! generated by oa-equations-codegen.py */
// SPDX-License-Identifier: MIT
/*
 * Copyright © 2024 Intel Corporation
 */

#ifndef __XE_OA_EQUATIONS_H__
#define __XE_OA_EQUATIONS_H__

#include <stddef.h>
#include <stdint.h>
#include <stdbool.h>

struct intel_xe_perf;
struct intel_xe_perf_metric_set;

double
percentage_max_callback_float(const struct intel_xe_perf *perf,
                              const struct intel_xe_perf_metric_set *metric_set,
                              uint64_t *accumulator);
uint64_t
percentage_max_callback_uint64(const struct intel_xe_perf *perf,
                               const struct intel_xe_perf_metric_set *metric_set,
                               uint64_t *accumulator);

uint64_t
tglgt1__render_basic__gpu_time__read(const struct intel_xe_perf *perf,
                                     const struct intel_xe_perf_metric_set *metric_set,
                                     uint64_t *accumulator);
uint64_t
tglgt1__render_basic__gpu_core_clocks__read(const struct intel_xe_perf *perf,
                                            const struct intel_xe_perf_metric_set *metric_set,
                                            uint64_t *accumulator);
uint64_t
tglgt1__render_basic__avg_gpu_core_frequency__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
uint64_t
tglgt1__render_basic__avg_gpu_core_frequency__max(const struct intel_xe_perf *perf,
                                                  const struct intel_xe_perf_metric_set *metric_set,
                                                  uint64_t *accumulator);

uint64_t
tglgt1__render_basic__vs_threads__read(const struct intel_xe_perf *perf,
                                       const struct intel_xe_perf_metric_set *metric_set,
                                       uint64_t *accumulator);
uint64_t
tglgt1__render_basic__hs_threads__read(const struct intel_xe_perf *perf,
                                       const struct intel_xe_perf_metric_set *metric_set,
                                       uint64_t *accumulator);
uint64_t
tglgt1__render_basic__ds_threads__read(const struct intel_xe_perf *perf,
                                       const struct intel_xe_perf_metric_set *metric_set,
                                       uint64_t *accumulator);
uint64_t
tglgt1__render_basic__gs_threads__read(const struct intel_xe_perf *perf,
                                       const struct intel_xe_perf_metric_set *metric_set,
                                       uint64_t *accumulator);
uint64_t
tglgt1__render_basic__ps_threads__read(const struct intel_xe_perf *perf,
                                       const struct intel_xe_perf_metric_set *metric_set,
                                       uint64_t *accumulator);
uint64_t
tglgt1__render_basic__cs_threads__read(const struct intel_xe_perf *perf,
                                       const struct intel_xe_perf_metric_set *metric_set,
                                       uint64_t *accumulator);
double
tglgt1__render_basic__gpu_busy__read(const struct intel_xe_perf *perf,
                                     const struct intel_xe_perf_metric_set *metric_set,
                                     uint64_t *accumulator);
double
tglgt1__render_basic__eu_active__read(const struct intel_xe_perf *perf,
                                      const struct intel_xe_perf_metric_set *metric_set,
                                      uint64_t *accumulator);
double
tglgt1__render_basic__eu_stall__read(const struct intel_xe_perf *perf,
                                     const struct intel_xe_perf_metric_set *metric_set,
                                     uint64_t *accumulator);
double
tglgt1__render_basic__eu_thread_occupancy__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
double
tglgt1__render_basic__sampler00_busy__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
double
tglgt1__render_basic__sampler00_bottleneck__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
#define tglgt1__render_basic__samplers_busy__read \
    tglgt1__render_basic__sampler00_busy__read
#define tglgt1__render_basic__sampler_bottleneck__read \
    tglgt1__render_basic__sampler00_bottleneck__read
uint64_t
tglgt1__render_basic__rasterized_pixels__read(const struct intel_xe_perf *perf,
                                              const struct intel_xe_perf_metric_set *metric_set,
                                              uint64_t *accumulator);
uint64_t
tglgt1__render_basic__hi_depth_test_fails__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
uint64_t
tglgt1__render_basic__early_depth_test_fails__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
uint64_t
tglgt1__render_basic__samples_killed_in_ps__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
uint64_t
tglgt1__render_basic__pixels_failing_post_ps_tests__read(const struct intel_xe_perf *perf,
                                                         const struct intel_xe_perf_metric_set *metric_set,
                                                         uint64_t *accumulator);
uint64_t
tglgt1__render_basic__samples_written__read(const struct intel_xe_perf *perf,
                                            const struct intel_xe_perf_metric_set *metric_set,
                                            uint64_t *accumulator);
uint64_t
tglgt1__render_basic__samples_blended__read(const struct intel_xe_perf *perf,
                                            const struct intel_xe_perf_metric_set *metric_set,
                                            uint64_t *accumulator);
uint64_t
tglgt1__render_basic__sampler_texels__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
uint64_t
tglgt1__render_basic__sampler_texel_misses__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
uint64_t
tglgt1__render_basic__slm_bytes_read__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
uint64_t
tglgt1__render_basic__slm_bytes_read__max(const struct intel_xe_perf *perf,
                                          const struct intel_xe_perf_metric_set *metric_set,
                                          uint64_t *accumulator);

uint64_t
tglgt1__render_basic__slm_bytes_written__read(const struct intel_xe_perf *perf,
                                              const struct intel_xe_perf_metric_set *metric_set,
                                              uint64_t *accumulator);
#define tglgt1__render_basic__slm_bytes_written__max \
    tglgt1__render_basic__slm_bytes_read__max

uint64_t
tglgt1__render_basic__shader_memory_accesses__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
uint64_t
tglgt1__render_basic__shader_atomics__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
uint64_t
tglgt1__render_basic__l3_shader_throughput__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
uint64_t
tglgt1__render_basic__l3_shader_throughput__max(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);

uint64_t
tglgt1__render_basic__shader_barriers__read(const struct intel_xe_perf *perf,
                                            const struct intel_xe_perf_metric_set *metric_set,
                                            uint64_t *accumulator);
uint64_t
tglgt1__render_basic__gti_read_throughput__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
uint64_t
tglgt1__render_basic__gti_read_throughput__max(const struct intel_xe_perf *perf,
                                               const struct intel_xe_perf_metric_set *metric_set,
                                               uint64_t *accumulator);

uint64_t
tglgt1__render_basic__gti_write_throughput__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
#define tglgt1__render_basic__gti_write_throughput__max \
    tglgt1__render_basic__gti_read_throughput__max

#define tglgt1__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define tglgt1__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define tglgt1__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define tglgt1__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

uint64_t
tglgt1__test_oa__counter0__read(const struct intel_xe_perf *perf,
                                const struct intel_xe_perf_metric_set *metric_set,
                                uint64_t *accumulator);
uint64_t
tglgt1__test_oa__counter1__read(const struct intel_xe_perf *perf,
                                const struct intel_xe_perf_metric_set *metric_set,
                                uint64_t *accumulator);
uint64_t
tglgt1__test_oa__counter2__read(const struct intel_xe_perf *perf,
                                const struct intel_xe_perf_metric_set *metric_set,
                                uint64_t *accumulator);
uint64_t
tglgt1__test_oa__counter3__read(const struct intel_xe_perf *perf,
                                const struct intel_xe_perf_metric_set *metric_set,
                                uint64_t *accumulator);
uint64_t
tglgt1__test_oa__counter4__read(const struct intel_xe_perf *perf,
                                const struct intel_xe_perf_metric_set *metric_set,
                                uint64_t *accumulator);
uint64_t
tglgt1__test_oa__counter5__read(const struct intel_xe_perf *perf,
                                const struct intel_xe_perf_metric_set *metric_set,
                                uint64_t *accumulator);
uint64_t
tglgt1__test_oa__counter6__read(const struct intel_xe_perf *perf,
                                const struct intel_xe_perf_metric_set *metric_set,
                                uint64_t *accumulator);
uint64_t
tglgt1__test_oa__counter7__read(const struct intel_xe_perf *perf,
                                const struct intel_xe_perf_metric_set *metric_set,
                                uint64_t *accumulator);
uint64_t
tglgt1__test_oa__counter8__read(const struct intel_xe_perf *perf,
                                const struct intel_xe_perf_metric_set *metric_set,
                                uint64_t *accumulator);
uint64_t
tglgt1__test_oa__counter9__read(const struct intel_xe_perf *perf,
                                const struct intel_xe_perf_metric_set *metric_set,
                                uint64_t *accumulator);
#define tglgt2__render_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define tglgt2__render_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define tglgt2__render_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define tglgt2__render_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define tglgt2__render_basic__vs_threads__read \
    tglgt1__render_basic__vs_threads__read
#define tglgt2__render_basic__hs_threads__read \
    tglgt1__render_basic__hs_threads__read
#define tglgt2__render_basic__ds_threads__read \
    tglgt1__render_basic__ds_threads__read
#define tglgt2__render_basic__gs_threads__read \
    tglgt1__render_basic__gs_threads__read
#define tglgt2__render_basic__ps_threads__read \
    tglgt1__render_basic__ps_threads__read
#define tglgt2__render_basic__cs_threads__read \
    tglgt1__render_basic__cs_threads__read
#define tglgt2__render_basic__gpu_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define tglgt2__render_basic__eu_active__read \
    tglgt1__render_basic__eu_active__read
#define tglgt2__render_basic__eu_stall__read \
    tglgt1__render_basic__eu_stall__read
#define tglgt2__render_basic__eu_thread_occupancy__read \
    tglgt1__render_basic__eu_thread_occupancy__read
#define tglgt2__render_basic__sampler00_busy__read \
    tglgt1__render_basic__sampler00_busy__read
#define tglgt2__render_basic__sampler00_bottleneck__read \
    tglgt1__render_basic__sampler00_bottleneck__read
#define tglgt2__render_basic__samplers_busy__read \
    tglgt1__render_basic__sampler00_busy__read
#define tglgt2__render_basic__sampler_bottleneck__read \
    tglgt1__render_basic__sampler00_bottleneck__read
#define tglgt2__render_basic__rasterized_pixels__read \
    tglgt1__render_basic__rasterized_pixels__read
#define tglgt2__render_basic__hi_depth_test_fails__read \
    tglgt1__render_basic__hi_depth_test_fails__read
#define tglgt2__render_basic__early_depth_test_fails__read \
    tglgt1__render_basic__early_depth_test_fails__read
#define tglgt2__render_basic__samples_killed_in_ps__read \
    tglgt1__render_basic__samples_killed_in_ps__read
#define tglgt2__render_basic__pixels_failing_post_ps_tests__read \
    tglgt1__render_basic__pixels_failing_post_ps_tests__read
#define tglgt2__render_basic__samples_written__read \
    tglgt1__render_basic__samples_written__read
#define tglgt2__render_basic__samples_blended__read \
    tglgt1__render_basic__samples_blended__read
#define tglgt2__render_basic__sampler_texels__read \
    tglgt1__render_basic__sampler_texels__read
#define tglgt2__render_basic__sampler_texel_misses__read \
    tglgt1__render_basic__sampler_texel_misses__read
#define tglgt2__render_basic__slm_bytes_read__read \
    tglgt1__render_basic__slm_bytes_read__read
#define tglgt2__render_basic__slm_bytes_read__max \
    tglgt1__render_basic__slm_bytes_read__max

#define tglgt2__render_basic__slm_bytes_written__read \
    tglgt1__render_basic__slm_bytes_written__read
#define tglgt2__render_basic__slm_bytes_written__max \
    tglgt1__render_basic__slm_bytes_read__max

#define tglgt2__render_basic__shader_memory_accesses__read \
    tglgt1__render_basic__shader_memory_accesses__read
#define tglgt2__render_basic__shader_atomics__read \
    tglgt1__render_basic__shader_atomics__read
#define tglgt2__render_basic__l3_shader_throughput__read \
    tglgt1__render_basic__l3_shader_throughput__read
#define tglgt2__render_basic__l3_shader_throughput__max \
    tglgt1__render_basic__l3_shader_throughput__max

#define tglgt2__render_basic__shader_barriers__read \
    tglgt1__render_basic__shader_barriers__read
#define tglgt2__render_basic__gti_read_throughput__read \
    tglgt1__render_basic__gti_read_throughput__read
#define tglgt2__render_basic__gti_read_throughput__max \
    tglgt1__render_basic__gti_read_throughput__max

#define tglgt2__render_basic__gti_write_throughput__read \
    tglgt1__render_basic__gti_write_throughput__read
#define tglgt2__render_basic__gti_write_throughput__max \
    tglgt1__render_basic__gti_read_throughput__max

#define tglgt2__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define tglgt2__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define tglgt2__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define tglgt2__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define tglgt2__test_oa__counter0__read \
    tglgt1__test_oa__counter0__read
#define tglgt2__test_oa__counter1__read \
    tglgt1__test_oa__counter1__read
#define tglgt2__test_oa__counter2__read \
    tglgt1__test_oa__counter2__read
#define tglgt2__test_oa__counter3__read \
    tglgt1__test_oa__counter3__read
#define tglgt2__test_oa__counter4__read \
    tglgt1__test_oa__counter4__read
#define tglgt2__test_oa__counter5__read \
    tglgt1__test_oa__counter5__read
#define tglgt2__test_oa__counter6__read \
    tglgt1__test_oa__counter6__read
#define tglgt2__test_oa__counter7__read \
    tglgt1__test_oa__counter7__read
#define tglgt2__test_oa__counter8__read \
    tglgt1__test_oa__counter8__read
#define tglgt2__test_oa__counter9__read \
    tglgt1__test_oa__counter9__read
#define dg1__render_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define dg1__render_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define dg1__render_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define dg1__render_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define dg1__render_basic__vs_threads__read \
    tglgt1__render_basic__vs_threads__read
#define dg1__render_basic__hs_threads__read \
    tglgt1__render_basic__hs_threads__read
#define dg1__render_basic__ds_threads__read \
    tglgt1__render_basic__ds_threads__read
#define dg1__render_basic__gs_threads__read \
    tglgt1__render_basic__gs_threads__read
#define dg1__render_basic__ps_threads__read \
    tglgt1__render_basic__ps_threads__read
#define dg1__render_basic__cs_threads__read \
    tglgt1__render_basic__cs_threads__read
#define dg1__render_basic__gpu_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define dg1__render_basic__eu_active__read \
    tglgt1__render_basic__eu_active__read
#define dg1__render_basic__eu_stall__read \
    tglgt1__render_basic__eu_stall__read
#define dg1__render_basic__eu_thread_occupancy__read \
    tglgt1__render_basic__eu_thread_occupancy__read
#define dg1__render_basic__sampler00_busy__read \
    tglgt1__render_basic__sampler00_busy__read
#define dg1__render_basic__sampler00_bottleneck__read \
    tglgt1__render_basic__sampler00_bottleneck__read
#define dg1__render_basic__samplers_busy__read \
    tglgt1__render_basic__sampler00_busy__read
#define dg1__render_basic__sampler_bottleneck__read \
    tglgt1__render_basic__sampler00_bottleneck__read
#define dg1__render_basic__rasterized_pixels__read \
    tglgt1__render_basic__rasterized_pixels__read
#define dg1__render_basic__hi_depth_test_fails__read \
    tglgt1__render_basic__hi_depth_test_fails__read
#define dg1__render_basic__early_depth_test_fails__read \
    tglgt1__render_basic__early_depth_test_fails__read
#define dg1__render_basic__samples_killed_in_ps__read \
    tglgt1__render_basic__samples_killed_in_ps__read
#define dg1__render_basic__pixels_failing_post_ps_tests__read \
    tglgt1__render_basic__pixels_failing_post_ps_tests__read
#define dg1__render_basic__samples_written__read \
    tglgt1__render_basic__samples_written__read
#define dg1__render_basic__samples_blended__read \
    tglgt1__render_basic__samples_blended__read
#define dg1__render_basic__sampler_texels__read \
    tglgt1__render_basic__sampler_texels__read
#define dg1__render_basic__sampler_texel_misses__read \
    tglgt1__render_basic__sampler_texel_misses__read
#define dg1__render_basic__slm_bytes_read__read \
    tglgt1__render_basic__slm_bytes_read__read
#define dg1__render_basic__slm_bytes_read__max \
    tglgt1__render_basic__slm_bytes_read__max

#define dg1__render_basic__slm_bytes_written__read \
    tglgt1__render_basic__slm_bytes_written__read
#define dg1__render_basic__slm_bytes_written__max \
    tglgt1__render_basic__slm_bytes_read__max

#define dg1__render_basic__shader_memory_accesses__read \
    tglgt1__render_basic__shader_memory_accesses__read
#define dg1__render_basic__shader_atomics__read \
    tglgt1__render_basic__shader_atomics__read
#define dg1__render_basic__l3_shader_throughput__read \
    tglgt1__render_basic__l3_shader_throughput__read
#define dg1__render_basic__l3_shader_throughput__max \
    tglgt1__render_basic__l3_shader_throughput__max

#define dg1__render_basic__shader_barriers__read \
    tglgt1__render_basic__shader_barriers__read
#define dg1__render_basic__gti_read_throughput__read \
    tglgt1__render_basic__gti_read_throughput__read
uint64_t
dg1__render_basic__gti_read_throughput__max(const struct intel_xe_perf *perf,
                                            const struct intel_xe_perf_metric_set *metric_set,
                                            uint64_t *accumulator);

#define dg1__render_basic__gti_write_throughput__read \
    tglgt1__render_basic__gti_write_throughput__read
#define dg1__render_basic__gti_write_throughput__max \
    dg1__render_basic__gti_read_throughput__max

#define dg1__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define dg1__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define dg1__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define dg1__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define dg1__test_oa__counter0__read \
    tglgt1__test_oa__counter0__read
#define dg1__test_oa__counter1__read \
    tglgt1__test_oa__counter1__read
#define dg1__test_oa__counter2__read \
    tglgt1__test_oa__counter2__read
#define dg1__test_oa__counter3__read \
    tglgt1__test_oa__counter3__read
#define dg1__test_oa__counter4__read \
    tglgt1__test_oa__counter4__read
#define dg1__test_oa__counter5__read \
    tglgt1__test_oa__counter5__read
#define dg1__test_oa__counter6__read \
    tglgt1__test_oa__counter6__read
#define dg1__test_oa__counter7__read \
    tglgt1__test_oa__counter7__read
#define dg1__test_oa__counter8__read \
    tglgt1__test_oa__counter8__read
#define dg1__test_oa__counter9__read \
    tglgt1__test_oa__counter9__read
#define rkl__render_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define rkl__render_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define rkl__render_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define rkl__render_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define rkl__render_basic__vs_threads__read \
    tglgt1__render_basic__vs_threads__read
#define rkl__render_basic__hs_threads__read \
    tglgt1__render_basic__hs_threads__read
#define rkl__render_basic__ds_threads__read \
    tglgt1__render_basic__ds_threads__read
#define rkl__render_basic__gs_threads__read \
    tglgt1__render_basic__gs_threads__read
#define rkl__render_basic__ps_threads__read \
    tglgt1__render_basic__ps_threads__read
#define rkl__render_basic__cs_threads__read \
    tglgt1__render_basic__cs_threads__read
#define rkl__render_basic__gpu_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define rkl__render_basic__eu_active__read \
    tglgt1__render_basic__eu_active__read
#define rkl__render_basic__eu_stall__read \
    tglgt1__render_basic__eu_stall__read
#define rkl__render_basic__eu_thread_occupancy__read \
    tglgt1__render_basic__eu_thread_occupancy__read
#define rkl__render_basic__sampler00_busy__read \
    tglgt1__render_basic__sampler00_busy__read
#define rkl__render_basic__sampler00_bottleneck__read \
    tglgt1__render_basic__sampler00_bottleneck__read
#define rkl__render_basic__samplers_busy__read \
    tglgt1__render_basic__sampler00_busy__read
#define rkl__render_basic__sampler_bottleneck__read \
    tglgt1__render_basic__sampler00_bottleneck__read
#define rkl__render_basic__rasterized_pixels__read \
    tglgt1__render_basic__rasterized_pixels__read
#define rkl__render_basic__hi_depth_test_fails__read \
    tglgt1__render_basic__hi_depth_test_fails__read
#define rkl__render_basic__early_depth_test_fails__read \
    tglgt1__render_basic__early_depth_test_fails__read
#define rkl__render_basic__samples_killed_in_ps__read \
    tglgt1__render_basic__samples_killed_in_ps__read
#define rkl__render_basic__pixels_failing_post_ps_tests__read \
    tglgt1__render_basic__pixels_failing_post_ps_tests__read
#define rkl__render_basic__samples_written__read \
    tglgt1__render_basic__samples_written__read
#define rkl__render_basic__samples_blended__read \
    tglgt1__render_basic__samples_blended__read
#define rkl__render_basic__sampler_texels__read \
    tglgt1__render_basic__sampler_texels__read
#define rkl__render_basic__sampler_texel_misses__read \
    tglgt1__render_basic__sampler_texel_misses__read
#define rkl__render_basic__slm_bytes_read__read \
    tglgt1__render_basic__slm_bytes_read__read
#define rkl__render_basic__slm_bytes_read__max \
    tglgt1__render_basic__slm_bytes_read__max

#define rkl__render_basic__slm_bytes_written__read \
    tglgt1__render_basic__slm_bytes_written__read
#define rkl__render_basic__slm_bytes_written__max \
    tglgt1__render_basic__slm_bytes_read__max

#define rkl__render_basic__shader_memory_accesses__read \
    tglgt1__render_basic__shader_memory_accesses__read
#define rkl__render_basic__shader_atomics__read \
    tglgt1__render_basic__shader_atomics__read
#define rkl__render_basic__l3_shader_throughput__read \
    tglgt1__render_basic__l3_shader_throughput__read
#define rkl__render_basic__l3_shader_throughput__max \
    tglgt1__render_basic__l3_shader_throughput__max

#define rkl__render_basic__shader_barriers__read \
    tglgt1__render_basic__shader_barriers__read
#define rkl__render_basic__gti_read_throughput__read \
    tglgt1__render_basic__gti_read_throughput__read
#define rkl__render_basic__gti_read_throughput__max \
    tglgt1__render_basic__gti_read_throughput__max

#define rkl__render_basic__gti_write_throughput__read \
    tglgt1__render_basic__gti_write_throughput__read
#define rkl__render_basic__gti_write_throughput__max \
    tglgt1__render_basic__gti_read_throughput__max

#define rkl__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define rkl__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define rkl__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define rkl__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define rkl__test_oa__counter0__read \
    tglgt1__test_oa__counter0__read
#define rkl__test_oa__counter1__read \
    tglgt1__test_oa__counter1__read
#define rkl__test_oa__counter2__read \
    tglgt1__test_oa__counter2__read
#define rkl__test_oa__counter3__read \
    tglgt1__test_oa__counter3__read
#define rkl__test_oa__counter4__read \
    tglgt1__test_oa__counter4__read
#define rkl__test_oa__counter5__read \
    tglgt1__test_oa__counter5__read
#define rkl__test_oa__counter6__read \
    tglgt1__test_oa__counter6__read
#define rkl__test_oa__counter7__read \
    tglgt1__test_oa__counter7__read
#define rkl__test_oa__counter8__read \
    tglgt1__test_oa__counter8__read
#define rkl__test_oa__counter9__read \
    tglgt1__test_oa__counter9__read
#define adl__render_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define adl__render_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define adl__render_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define adl__render_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define adl__render_basic__vs_threads__read \
    tglgt1__render_basic__vs_threads__read
#define adl__render_basic__hs_threads__read \
    tglgt1__render_basic__hs_threads__read
#define adl__render_basic__ds_threads__read \
    tglgt1__render_basic__ds_threads__read
#define adl__render_basic__gs_threads__read \
    tglgt1__render_basic__gs_threads__read
#define adl__render_basic__ps_threads__read \
    tglgt1__render_basic__ps_threads__read
#define adl__render_basic__cs_threads__read \
    tglgt1__render_basic__cs_threads__read
#define adl__render_basic__gpu_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define adl__render_basic__eu_active__read \
    tglgt1__render_basic__eu_active__read
#define adl__render_basic__eu_stall__read \
    tglgt1__render_basic__eu_stall__read
#define adl__render_basic__eu_thread_occupancy__read \
    tglgt1__render_basic__eu_thread_occupancy__read
#define adl__render_basic__sampler00_busy__read \
    tglgt1__render_basic__sampler00_busy__read
#define adl__render_basic__sampler00_bottleneck__read \
    tglgt1__render_basic__sampler00_bottleneck__read
#define adl__render_basic__samplers_busy__read \
    tglgt1__render_basic__sampler00_busy__read
#define adl__render_basic__sampler_bottleneck__read \
    tglgt1__render_basic__sampler00_bottleneck__read
#define adl__render_basic__rasterized_pixels__read \
    tglgt1__render_basic__rasterized_pixels__read
#define adl__render_basic__hi_depth_test_fails__read \
    tglgt1__render_basic__hi_depth_test_fails__read
#define adl__render_basic__early_depth_test_fails__read \
    tglgt1__render_basic__early_depth_test_fails__read
#define adl__render_basic__samples_killed_in_ps__read \
    tglgt1__render_basic__samples_killed_in_ps__read
#define adl__render_basic__pixels_failing_post_ps_tests__read \
    tglgt1__render_basic__pixels_failing_post_ps_tests__read
#define adl__render_basic__samples_written__read \
    tglgt1__render_basic__samples_written__read
#define adl__render_basic__samples_blended__read \
    tglgt1__render_basic__samples_blended__read
#define adl__render_basic__sampler_texels__read \
    tglgt1__render_basic__sampler_texels__read
#define adl__render_basic__sampler_texel_misses__read \
    tglgt1__render_basic__sampler_texel_misses__read
#define adl__render_basic__slm_bytes_read__read \
    tglgt1__render_basic__slm_bytes_read__read
#define adl__render_basic__slm_bytes_read__max \
    tglgt1__render_basic__slm_bytes_read__max

#define adl__render_basic__slm_bytes_written__read \
    tglgt1__render_basic__slm_bytes_written__read
#define adl__render_basic__slm_bytes_written__max \
    tglgt1__render_basic__slm_bytes_read__max

#define adl__render_basic__shader_memory_accesses__read \
    tglgt1__render_basic__shader_memory_accesses__read
#define adl__render_basic__shader_atomics__read \
    tglgt1__render_basic__shader_atomics__read
#define adl__render_basic__l3_shader_throughput__read \
    tglgt1__render_basic__l3_shader_throughput__read
#define adl__render_basic__l3_shader_throughput__max \
    tglgt1__render_basic__l3_shader_throughput__max

#define adl__render_basic__shader_barriers__read \
    tglgt1__render_basic__shader_barriers__read
#define adl__render_basic__gti_read_throughput__read \
    tglgt1__render_basic__gti_read_throughput__read
#define adl__render_basic__gti_read_throughput__max \
    tglgt1__render_basic__gti_read_throughput__max

#define adl__render_basic__gti_write_throughput__read \
    tglgt1__render_basic__gti_write_throughput__read
#define adl__render_basic__gti_write_throughput__max \
    tglgt1__render_basic__gti_read_throughput__max

#define adl__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define adl__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define adl__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define adl__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define adl__test_oa__counter0__read \
    tglgt1__test_oa__counter0__read
#define adl__test_oa__counter1__read \
    tglgt1__test_oa__counter1__read
#define adl__test_oa__counter2__read \
    tglgt1__test_oa__counter2__read
#define adl__test_oa__counter3__read \
    tglgt1__test_oa__counter3__read
#define adl__test_oa__counter4__read \
    tglgt1__test_oa__counter4__read
#define adl__test_oa__counter5__read \
    tglgt1__test_oa__counter5__read
#define adl__test_oa__counter6__read \
    tglgt1__test_oa__counter6__read
#define adl__test_oa__counter7__read \
    tglgt1__test_oa__counter7__read
#define adl__test_oa__counter8__read \
    tglgt1__test_oa__counter8__read
#define adl__test_oa__counter9__read \
    tglgt1__test_oa__counter9__read
#define acmgt1__render_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define acmgt1__render_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define acmgt1__render_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define acmgt1__render_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define acmgt1__render_basic__cs_threads__read \
    tglgt1__render_basic__cs_threads__read
#define acmgt1__render_basic__gpu_busy__read \
    tglgt1__render_basic__gpu_busy__read
double
acmgt1__render_basic__xve_active__read(const struct intel_xe_perf *perf,
                                       const struct intel_xe_perf_metric_set *metric_set,
                                       uint64_t *accumulator);
double
acmgt1__render_basic__xve_stall__read(const struct intel_xe_perf *perf,
                                      const struct intel_xe_perf_metric_set *metric_set,
                                      uint64_t *accumulator);
double
acmgt1__render_basic__xve_thread_occupancy__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
double
acmgt1__render_basic__xve_fpu_em_active__read(const struct intel_xe_perf *perf,
                                              const struct intel_xe_perf_metric_set *metric_set,
                                              uint64_t *accumulator);
double
acmgt1__render_basic__vs_fpu_active__read(const struct intel_xe_perf *perf,
                                          const struct intel_xe_perf_metric_set *metric_set,
                                          uint64_t *accumulator);
double
acmgt1__render_basic__vs_em_active__read(const struct intel_xe_perf *perf,
                                         const struct intel_xe_perf_metric_set *metric_set,
                                         uint64_t *accumulator);
double
acmgt1__render_basic__vs_send_active__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
double
acmgt1__render_basic__ps_fpu_active__read(const struct intel_xe_perf *perf,
                                          const struct intel_xe_perf_metric_set *metric_set,
                                          uint64_t *accumulator);
double
acmgt1__render_basic__ps_em_active__read(const struct intel_xe_perf *perf,
                                         const struct intel_xe_perf_metric_set *metric_set,
                                         uint64_t *accumulator);
double
acmgt1__render_basic__ps_send_active__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
#define acmgt1__render_basic__samples_written__read \
    tglgt1__render_basic__samples_written__read
#define acmgt1__render_basic__samples_blended__read \
    tglgt1__render_basic__samples_blended__read
#define acmgt1__render_basic__sampler_texels__read \
    tglgt1__render_basic__sampler_texels__read
#define acmgt1__render_basic__sampler_texel_misses__read \
    tglgt1__render_basic__sampler_texel_misses__read
uint64_t
acmgt1__render_basic__slm_reads__read(const struct intel_xe_perf *perf,
                                      const struct intel_xe_perf_metric_set *metric_set,
                                      uint64_t *accumulator);
uint64_t
acmgt1__render_basic__slm_reads__max(const struct intel_xe_perf *perf,
                                     const struct intel_xe_perf_metric_set *metric_set,
                                     uint64_t *accumulator);

uint64_t
acmgt1__render_basic__slm_writes__read(const struct intel_xe_perf *perf,
                                       const struct intel_xe_perf_metric_set *metric_set,
                                       uint64_t *accumulator);
#define acmgt1__render_basic__slm_writes__max \
    acmgt1__render_basic__slm_reads__max

#define acmgt1__render_basic__shader_memory_accesses__read \
    tglgt1__render_basic__shader_memory_accesses__read
#define acmgt1__render_basic__shader_atomics__read \
    tglgt1__render_basic__shader_atomics__read
#define acmgt1__render_basic__shader_barriers__read \
    tglgt1__render_basic__shader_barriers__read
uint64_t
acmgt1__render_basic__gti_read_throughput__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
uint64_t
acmgt1__render_basic__gti_read_throughput__max(const struct intel_xe_perf *perf,
                                               const struct intel_xe_perf_metric_set *metric_set,
                                               uint64_t *accumulator);

uint64_t
acmgt1__render_basic__gti_write_throughput__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
#define acmgt1__render_basic__gti_write_throughput__max \
    acmgt1__render_basic__gti_read_throughput__max

double
acmgt1__render_basic__sampler20_busy__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
#define acmgt1__render_basic__samplers_busy__read \
    acmgt1__render_basic__sampler20_busy__read
double
acmgt1__render_basic__sampler20_bottleneck__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
#define acmgt1__render_basic__sampler_bottleneck__read \
    acmgt1__render_basic__sampler20_bottleneck__read
#define acmgt1__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define acmgt1__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define acmgt1__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define acmgt1__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define acmgt1__test_oa__counter0__read \
    tglgt1__test_oa__counter0__read
#define acmgt1__test_oa__counter1__read \
    tglgt1__test_oa__counter1__read
#define acmgt1__test_oa__counter2__read \
    tglgt1__test_oa__counter2__read
#define acmgt1__test_oa__counter3__read \
    tglgt1__test_oa__counter3__read
#define acmgt1__test_oa__counter4__read \
    tglgt1__test_oa__counter4__read
#define acmgt1__test_oa__counter5__read \
    tglgt1__test_oa__counter5__read
#define acmgt1__test_oa__counter6__read \
    tglgt1__test_oa__counter6__read
#define acmgt1__test_oa__counter7__read \
    tglgt1__test_oa__counter7__read
#define acmgt1__test_oa__counter8__read \
    tglgt1__test_oa__counter8__read
#define acmgt1__test_oa__counter9__read \
    tglgt1__test_oa__counter9__read
#define acmgt2__render_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define acmgt2__render_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define acmgt2__render_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define acmgt2__render_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define acmgt2__render_basic__vs_threads__read \
    tglgt1__render_basic__vs_threads__read
#define acmgt2__render_basic__hs_threads__read \
    tglgt1__render_basic__hs_threads__read
#define acmgt2__render_basic__ds_threads__read \
    tglgt1__render_basic__ds_threads__read
#define acmgt2__render_basic__gs_threads__read \
    tglgt1__render_basic__gs_threads__read
#define acmgt2__render_basic__ps_threads__read \
    tglgt1__render_basic__ps_threads__read
#define acmgt2__render_basic__cs_threads__read \
    tglgt1__render_basic__cs_threads__read
#define acmgt2__render_basic__gpu_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define acmgt2__render_basic__xve_active__read \
    acmgt1__render_basic__xve_active__read
#define acmgt2__render_basic__xve_stall__read \
    acmgt1__render_basic__xve_stall__read
#define acmgt2__render_basic__xve_thread_occupancy__read \
    acmgt1__render_basic__xve_thread_occupancy__read
#define acmgt2__render_basic__xve_fpu_em_active__read \
    acmgt1__render_basic__xve_fpu_em_active__read
#define acmgt2__render_basic__vs_fpu_active__read \
    acmgt1__render_basic__vs_fpu_active__read
#define acmgt2__render_basic__vs_em_active__read \
    acmgt1__render_basic__vs_em_active__read
#define acmgt2__render_basic__vs_send_active__read \
    acmgt1__render_basic__vs_send_active__read
#define acmgt2__render_basic__ps_fpu_active__read \
    acmgt1__render_basic__ps_fpu_active__read
#define acmgt2__render_basic__ps_em_active__read \
    acmgt1__render_basic__ps_em_active__read
#define acmgt2__render_basic__ps_send_active__read \
    acmgt1__render_basic__ps_send_active__read
#define acmgt2__render_basic__rasterized_pixels__read \
    tglgt1__render_basic__rasterized_pixels__read
#define acmgt2__render_basic__hi_depth_test_fails__read \
    tglgt1__render_basic__hi_depth_test_fails__read
#define acmgt2__render_basic__early_depth_test_fails__read \
    tglgt1__render_basic__early_depth_test_fails__read
#define acmgt2__render_basic__samples_killed_in_ps__read \
    tglgt1__render_basic__samples_killed_in_ps__read
#define acmgt2__render_basic__pixels_failing_post_ps_tests__read \
    tglgt1__render_basic__pixels_failing_post_ps_tests__read
#define acmgt2__render_basic__samples_written__read \
    tglgt1__render_basic__samples_written__read
#define acmgt2__render_basic__samples_blended__read \
    tglgt1__render_basic__samples_blended__read
#define acmgt2__render_basic__sampler_texels__read \
    tglgt1__render_basic__sampler_texels__read
#define acmgt2__render_basic__sampler_texel_misses__read \
    tglgt1__render_basic__sampler_texel_misses__read
#define acmgt2__render_basic__slm_reads__read \
    acmgt1__render_basic__slm_reads__read
#define acmgt2__render_basic__slm_reads__max \
    acmgt1__render_basic__slm_reads__max

#define acmgt2__render_basic__slm_writes__read \
    acmgt1__render_basic__slm_writes__read
#define acmgt2__render_basic__slm_writes__max \
    acmgt1__render_basic__slm_reads__max

#define acmgt2__render_basic__shader_memory_accesses__read \
    tglgt1__render_basic__shader_memory_accesses__read
#define acmgt2__render_basic__shader_atomics__read \
    tglgt1__render_basic__shader_atomics__read
#define acmgt2__render_basic__shader_barriers__read \
    tglgt1__render_basic__shader_barriers__read
#define acmgt2__render_basic__gti_read_throughput__read \
    acmgt1__render_basic__gti_read_throughput__read
#define acmgt2__render_basic__gti_read_throughput__max \
    acmgt1__render_basic__gti_read_throughput__max

uint64_t
acmgt2__render_basic__gti_write_throughput__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
#define acmgt2__render_basic__gti_write_throughput__max \
    acmgt1__render_basic__gti_read_throughput__max

double
acmgt2__render_basic__sampler20_busy__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
#define acmgt2__render_basic__samplers_busy__read \
    acmgt2__render_basic__sampler20_busy__read
double
acmgt2__render_basic__sampler20_bottleneck__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
#define acmgt2__render_basic__sampler_bottleneck__read \
    acmgt2__render_basic__sampler20_bottleneck__read
#define acmgt2__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define acmgt2__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define acmgt2__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define acmgt2__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define acmgt2__test_oa__counter0__read \
    tglgt1__test_oa__counter0__read
#define acmgt2__test_oa__counter1__read \
    tglgt1__test_oa__counter1__read
#define acmgt2__test_oa__counter2__read \
    tglgt1__test_oa__counter2__read
#define acmgt2__test_oa__counter3__read \
    tglgt1__test_oa__counter3__read
#define acmgt2__test_oa__counter4__read \
    tglgt1__test_oa__counter4__read
#define acmgt2__test_oa__counter5__read \
    tglgt1__test_oa__counter5__read
#define acmgt2__test_oa__counter6__read \
    tglgt1__test_oa__counter6__read
#define acmgt2__test_oa__counter7__read \
    tglgt1__test_oa__counter7__read
#define acmgt2__test_oa__counter8__read \
    tglgt1__test_oa__counter8__read
#define acmgt2__test_oa__counter9__read \
    tglgt1__test_oa__counter9__read
#define acmgt3__render_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define acmgt3__render_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define acmgt3__render_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define acmgt3__render_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define acmgt3__render_basic__vs_threads__read \
    tglgt1__render_basic__vs_threads__read
#define acmgt3__render_basic__hs_threads__read \
    tglgt1__render_basic__hs_threads__read
#define acmgt3__render_basic__ds_threads__read \
    tglgt1__render_basic__ds_threads__read
#define acmgt3__render_basic__gs_threads__read \
    tglgt1__render_basic__gs_threads__read
#define acmgt3__render_basic__ps_threads__read \
    tglgt1__render_basic__ps_threads__read
#define acmgt3__render_basic__cs_threads__read \
    tglgt1__render_basic__cs_threads__read
#define acmgt3__render_basic__gpu_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define acmgt3__render_basic__xve_active__read \
    acmgt1__render_basic__xve_active__read
#define acmgt3__render_basic__xve_stall__read \
    acmgt1__render_basic__xve_stall__read
#define acmgt3__render_basic__xve_thread_occupancy__read \
    acmgt1__render_basic__xve_thread_occupancy__read
#define acmgt3__render_basic__xve_fpu_em_active__read \
    acmgt1__render_basic__xve_fpu_em_active__read
#define acmgt3__render_basic__vs_fpu_active__read \
    acmgt1__render_basic__vs_fpu_active__read
#define acmgt3__render_basic__vs_em_active__read \
    acmgt1__render_basic__vs_em_active__read
#define acmgt3__render_basic__vs_send_active__read \
    acmgt1__render_basic__vs_send_active__read
#define acmgt3__render_basic__ps_fpu_active__read \
    acmgt1__render_basic__ps_fpu_active__read
#define acmgt3__render_basic__ps_em_active__read \
    acmgt1__render_basic__ps_em_active__read
#define acmgt3__render_basic__ps_send_active__read \
    acmgt1__render_basic__ps_send_active__read
#define acmgt3__render_basic__rasterized_pixels__read \
    tglgt1__render_basic__rasterized_pixels__read
#define acmgt3__render_basic__hi_depth_test_fails__read \
    tglgt1__render_basic__hi_depth_test_fails__read
#define acmgt3__render_basic__early_depth_test_fails__read \
    tglgt1__render_basic__early_depth_test_fails__read
#define acmgt3__render_basic__samples_killed_in_ps__read \
    tglgt1__render_basic__samples_killed_in_ps__read
#define acmgt3__render_basic__pixels_failing_post_ps_tests__read \
    tglgt1__render_basic__pixels_failing_post_ps_tests__read
#define acmgt3__render_basic__samples_written__read \
    tglgt1__render_basic__samples_written__read
#define acmgt3__render_basic__samples_blended__read \
    tglgt1__render_basic__samples_blended__read
#define acmgt3__render_basic__sampler_texels__read \
    tglgt1__render_basic__sampler_texels__read
#define acmgt3__render_basic__sampler_texel_misses__read \
    tglgt1__render_basic__sampler_texel_misses__read
#define acmgt3__render_basic__slm_reads__read \
    acmgt1__render_basic__slm_reads__read
#define acmgt3__render_basic__slm_reads__max \
    acmgt1__render_basic__slm_reads__max

#define acmgt3__render_basic__slm_writes__read \
    acmgt1__render_basic__slm_writes__read
#define acmgt3__render_basic__slm_writes__max \
    acmgt1__render_basic__slm_reads__max

#define acmgt3__render_basic__shader_memory_accesses__read \
    tglgt1__render_basic__shader_memory_accesses__read
#define acmgt3__render_basic__shader_atomics__read \
    tglgt1__render_basic__shader_atomics__read
#define acmgt3__render_basic__shader_barriers__read \
    tglgt1__render_basic__shader_barriers__read
#define acmgt3__render_basic__gti_read_throughput__read \
    acmgt1__render_basic__gti_read_throughput__read
#define acmgt3__render_basic__gti_read_throughput__max \
    acmgt1__render_basic__gti_read_throughput__max

#define acmgt3__render_basic__gti_write_throughput__read \
    acmgt2__render_basic__gti_write_throughput__read
#define acmgt3__render_basic__gti_write_throughput__max \
    acmgt1__render_basic__gti_read_throughput__max

double
acmgt3__render_basic__sampler00_busy__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
#define acmgt3__render_basic__samplers_busy__read \
    acmgt3__render_basic__sampler00_busy__read
double
acmgt3__render_basic__sampler00_bottleneck__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
#define acmgt3__render_basic__sampler_bottleneck__read \
    acmgt3__render_basic__sampler00_bottleneck__read
#define acmgt3__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define acmgt3__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define acmgt3__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define acmgt3__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define acmgt3__test_oa__counter0__read \
    tglgt1__test_oa__counter0__read
#define acmgt3__test_oa__counter1__read \
    tglgt1__test_oa__counter1__read
#define acmgt3__test_oa__counter2__read \
    tglgt1__test_oa__counter2__read
#define acmgt3__test_oa__counter3__read \
    tglgt1__test_oa__counter3__read
#define acmgt3__test_oa__counter4__read \
    tglgt1__test_oa__counter4__read
#define acmgt3__test_oa__counter5__read \
    tglgt1__test_oa__counter5__read
#define acmgt3__test_oa__counter6__read \
    tglgt1__test_oa__counter6__read
#define acmgt3__test_oa__counter7__read \
    tglgt1__test_oa__counter7__read
#define acmgt3__test_oa__counter8__read \
    tglgt1__test_oa__counter8__read
#define acmgt3__test_oa__counter9__read \
    tglgt1__test_oa__counter9__read
#define pvc__compute_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define pvc__compute_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define pvc__compute_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define pvc__compute_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define pvc__compute_basic__gpu_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define pvc__compute_basic__cs_threads__read \
    tglgt1__render_basic__cs_threads__read
#define pvc__compute_basic__shader_memory_accesses__read \
    tglgt1__render_basic__shader_memory_accesses__read
#define pvc__compute_basic__shader_atomics__read \
    tglgt1__render_basic__shader_atomics__read
#define pvc__compute_basic__shader_barriers__read \
    tglgt1__render_basic__shader_barriers__read
#define pvc__compute_basic__slm_reads__read \
    acmgt1__render_basic__slm_reads__read
uint64_t
pvc__compute_basic__slm_reads__max(const struct intel_xe_perf *perf,
                                   const struct intel_xe_perf_metric_set *metric_set,
                                   uint64_t *accumulator);

#define pvc__compute_basic__slm_writes__read \
    acmgt1__render_basic__slm_writes__read
#define pvc__compute_basic__slm_writes__max \
    pvc__compute_basic__slm_reads__max

#define pvc__compute_basic__gti_read_throughput__read \
    acmgt1__render_basic__gti_read_throughput__read
#define pvc__compute_basic__gti_read_throughput__max \
    tglgt1__render_basic__gti_read_throughput__max

#define pvc__compute_basic__gti_write_throughput__read \
    acmgt2__render_basic__gti_write_throughput__read
#define pvc__compute_basic__gti_write_throughput__max \
    tglgt1__render_basic__gti_read_throughput__max

#define pvc__compute_basic__eu_active_cycles__read \
    acmgt1__render_basic__xve_active__read
#define pvc__compute_basic__eu_stall_cycles__read \
    acmgt1__render_basic__xve_stall__read
double
pvc__compute_basic__eu_inst_executed_alu0_all__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
#define pvc__compute_basic__eu_inst_executed_alu1_all__read \
    acmgt1__render_basic__xve_fpu_em_active__read
#define pvc__compute_basic__eu_inst_executed_systolic_all__read \
    acmgt1__render_basic__vs_send_active__read
#define pvc__compute_basic__eu_inst_executed_send_all__read \
    acmgt1__render_basic__vs_fpu_active__read
#define pvc__compute_basic__eu_inst_executed_control_all__read \
    acmgt1__render_basic__vs_em_active__read
#define pvc__compute_basic__eu_pipe_alu0_and_alu1_active_cycles__read \
    acmgt1__render_basic__ps_em_active__read
#define pvc__compute_basic__eu_pipe_alu0_and_systolic_active_cycles__read \
    acmgt1__render_basic__ps_fpu_active__read
double
pvc__compute_basic__eu_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
uint64_t
pvc__compute_basic__sysmem_transaction_read__read(const struct intel_xe_perf *perf,
                                                  const struct intel_xe_perf_metric_set *metric_set,
                                                  uint64_t *accumulator);
uint64_t
pvc__compute_basic__sysmem_transaction_write__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
uint64_t
pvc__compute_basic__host_to_gpumem_transaction_read__read(const struct intel_xe_perf *perf,
                                                          const struct intel_xe_perf_metric_set *metric_set,
                                                          uint64_t *accumulator);
uint64_t
pvc__compute_basic__host_to_gpumem_transaction_write__read(const struct intel_xe_perf *perf,
                                                           const struct intel_xe_perf_metric_set *metric_set,
                                                           uint64_t *accumulator);
double
pvc__compute_basic__gpu_memory_request_queue_full_sqidi0__read(const struct intel_xe_perf *perf,
                                                               const struct intel_xe_perf_metric_set *metric_set,
                                                               uint64_t *accumulator);
double
pvc__compute_basic__gpu_memory_request_queue_full_sqidi1__read(const struct intel_xe_perf *perf,
                                                               const struct intel_xe_perf_metric_set *metric_set,
                                                               uint64_t *accumulator);
double
pvc__compute_basic__gpu_memory_request_queue_full_sqidi2__read(const struct intel_xe_perf *perf,
                                                               const struct intel_xe_perf_metric_set *metric_set,
                                                               uint64_t *accumulator);
double
pvc__compute_basic__gpu_memory_request_queue_full_sqidi3__read(const struct intel_xe_perf *perf,
                                                               const struct intel_xe_perf_metric_set *metric_set,
                                                               uint64_t *accumulator);
#define pvc__compute_basic__gpu_memory_request_queue_full_sqidi4__read \
    acmgt3__render_basic__sampler00_busy__read
#define pvc__compute_basic__gpu_memory_request_queue_full_sqidi8__read \
    acmgt3__render_basic__sampler00_bottleneck__read
double
pvc__compute_basic__gpu_memory_request_queue_full_sqidi12__read(const struct intel_xe_perf *perf,
                                                                const struct intel_xe_perf_metric_set *metric_set,
                                                                uint64_t *accumulator);
#define pvc__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define pvc__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define pvc__test_oa__counter0__read \
    tglgt1__test_oa__counter0__read
#define pvc__test_oa__counter1__read \
    tglgt1__test_oa__counter1__read
#define pvc__test_oa__counter3__read \
    tglgt1__test_oa__counter2__read
#define pvc__test_oa__counter4__read \
    tglgt1__test_oa__counter3__read
#define pvc__test_oa__counter5__read \
    tglgt1__test_oa__counter4__read
#define pvc__test_oa__counter8__read \
    pvc__compute_basic__sysmem_transaction_read__read
#define pvc__test_oa__l3_bank_input_available_l3_bank0__read \
    acmgt2__render_basic__sampler20_bottleneck__read
#define pvc__test_oa__l3_output_ready_l3_bank0__read \
    pvc__compute_basic__gpu_memory_request_queue_full_sqidi0__read
#define pvc__test_oa__l3_read_l3_bank0__read \
    pvc__compute_basic__host_to_gpumem_transaction_read__read
#define pvc__test_oa__l3_write_l3_bank0__read \
    pvc__compute_basic__host_to_gpumem_transaction_write__read
#define pvc__test_oa__threadgroup_dispatch_queue0_active_cycles_dualsubslice0__read \
    pvc__compute_basic__gpu_memory_request_queue_full_sqidi12__read
#define pvc__test_oa__threadgroup_dispatch_queue1_active_cycles_dualsubslice0__read \
    acmgt3__render_basic__sampler00_bottleneck__read
#define pvc__test_oa__eu_active__read \
    acmgt1__render_basic__xve_active__read
#define pvc__test_oa__eu_stall__read \
    acmgt1__render_basic__xve_stall__read
double
pvc__test_oa__eu_thread_occupancy__read(const struct intel_xe_perf *perf,
                                        const struct intel_xe_perf_metric_set *metric_set,
                                        uint64_t *accumulator);
#define pvc__test_oa__fpu_active__read \
    acmgt1__render_basic__vs_fpu_active__read
#define pvc__test_oa__em_active__read \
    acmgt1__render_basic__vs_em_active__read
#define pvc__test_oa__sys_active__read \
    acmgt1__render_basic__vs_send_active__read
#define pvc__test_oa__em_fpu_active__read \
    pvc__compute_basic__eu_inst_executed_alu0_all__read
#define pvc__test_oa__sys_fpu_active__read \
    acmgt1__render_basic__ps_fpu_active__read
#define pvc__test_oa__cs_threads__read \
    tglgt1__render_basic__cs_threads__read
#define pvc__test_oa__gpu_busy__read \
    tglgt1__render_basic__gpu_busy__read
uint64_t
pvc__test_oa__gti_read_transactions__read(const struct intel_xe_perf *perf,
                                          const struct intel_xe_perf_metric_set *metric_set,
                                          uint64_t *accumulator);
uint64_t
pvc__test_oa__gti_read_transactions__max(const struct intel_xe_perf *perf,
                                         const struct intel_xe_perf_metric_set *metric_set,
                                         uint64_t *accumulator);

uint64_t
pvc__test_oa__gti_write_transactions__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
#define pvc__test_oa__gti_write_transactions__max \
    pvc__test_oa__gti_read_transactions__max

#define mtlgt2__render_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define mtlgt2__render_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define mtlgt2__render_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define mtlgt2__render_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define mtlgt2__render_basic__vs_threads__read \
    tglgt1__render_basic__vs_threads__read
#define mtlgt2__render_basic__hs_threads__read \
    tglgt1__render_basic__hs_threads__read
#define mtlgt2__render_basic__ds_threads__read \
    tglgt1__render_basic__ds_threads__read
#define mtlgt2__render_basic__gs_threads__read \
    tglgt1__render_basic__gs_threads__read
#define mtlgt2__render_basic__ps_threads__read \
    tglgt1__render_basic__ps_threads__read
#define mtlgt2__render_basic__cs_threads__read \
    tglgt1__render_basic__cs_threads__read
#define mtlgt2__render_basic__gpu_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define mtlgt2__render_basic__xve_active__read \
    acmgt1__render_basic__xve_active__read
#define mtlgt2__render_basic__xve_stall__read \
    acmgt1__render_basic__xve_stall__read
#define mtlgt2__render_basic__xve_thread_occupancy__read \
    acmgt1__render_basic__xve_thread_occupancy__read
#define mtlgt2__render_basic__xve_fpu_em_active__read \
    acmgt1__render_basic__xve_fpu_em_active__read
#define mtlgt2__render_basic__vs_fpu_active__read \
    acmgt1__render_basic__vs_fpu_active__read
#define mtlgt2__render_basic__vs_em_active__read \
    acmgt1__render_basic__vs_em_active__read
#define mtlgt2__render_basic__vs_send_active__read \
    acmgt1__render_basic__vs_send_active__read
#define mtlgt2__render_basic__ps_fpu_active__read \
    acmgt1__render_basic__ps_fpu_active__read
#define mtlgt2__render_basic__ps_em_active__read \
    acmgt1__render_basic__ps_em_active__read
#define mtlgt2__render_basic__ps_send_active__read \
    acmgt1__render_basic__ps_send_active__read
#define mtlgt2__render_basic__rasterized_pixels__read \
    tglgt1__render_basic__rasterized_pixels__read
#define mtlgt2__render_basic__hi_depth_test_fails__read \
    tglgt1__render_basic__hi_depth_test_fails__read
#define mtlgt2__render_basic__early_depth_test_fails__read \
    tglgt1__render_basic__early_depth_test_fails__read
#define mtlgt2__render_basic__samples_killed_in_ps__read \
    tglgt1__render_basic__samples_killed_in_ps__read
#define mtlgt2__render_basic__pixels_failing_post_ps_tests__read \
    tglgt1__render_basic__pixels_failing_post_ps_tests__read
#define mtlgt2__render_basic__samples_written__read \
    tglgt1__render_basic__samples_written__read
#define mtlgt2__render_basic__samples_blended__read \
    tglgt1__render_basic__samples_blended__read
#define mtlgt2__render_basic__sampler_texels__read \
    tglgt1__render_basic__sampler_texels__read
#define mtlgt2__render_basic__sampler_texel_misses__read \
    tglgt1__render_basic__sampler_texel_misses__read
#define mtlgt2__render_basic__slm_reads__read \
    acmgt1__render_basic__slm_reads__read
#define mtlgt2__render_basic__slm_reads__max \
    acmgt1__render_basic__slm_reads__max

#define mtlgt2__render_basic__slm_writes__read \
    acmgt1__render_basic__slm_writes__read
#define mtlgt2__render_basic__slm_writes__max \
    acmgt1__render_basic__slm_reads__max

#define mtlgt2__render_basic__shader_memory_accesses__read \
    tglgt1__render_basic__shader_memory_accesses__read
#define mtlgt2__render_basic__shader_atomics__read \
    tglgt1__render_basic__shader_atomics__read
#define mtlgt2__render_basic__shader_barriers__read \
    tglgt1__render_basic__shader_barriers__read
uint64_t
mtlgt2__render_basic__gti_read_throughput__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
#define mtlgt2__render_basic__gti_read_throughput__max \
    acmgt1__render_basic__gti_read_throughput__max

uint64_t
mtlgt2__render_basic__gti_write_throughput__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
#define mtlgt2__render_basic__gti_write_throughput__max \
    acmgt1__render_basic__gti_read_throughput__max

#define mtlgt2__render_basic__samplers_busy__read \
    acmgt2__render_basic__sampler20_busy__read
#define mtlgt2__render_basic__sampler_bottleneck__read \
    acmgt2__render_basic__sampler20_bottleneck__read
#define mtlgt2__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define mtlgt2__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define mtlgt2__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define mtlgt2__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define mtlgt2__test_oa__counter0__read \
    tglgt1__test_oa__counter0__read
#define mtlgt2__test_oa__counter1__read \
    tglgt1__test_oa__counter1__read
#define mtlgt2__test_oa__counter2__read \
    tglgt1__test_oa__counter2__read
#define mtlgt2__test_oa__counter3__read \
    tglgt1__test_oa__counter3__read
#define mtlgt2__test_oa__counter4__read \
    tglgt1__test_oa__counter4__read
#define mtlgt2__test_oa__counter5__read \
    tglgt1__test_oa__counter5__read
#define mtlgt2__test_oa__counter6__read \
    tglgt1__test_oa__counter6__read
#define mtlgt2__test_oa__counter7__read \
    tglgt1__test_oa__counter7__read
#define mtlgt2__test_oa__counter8__read \
    pvc__compute_basic__sysmem_transaction_read__read
#define mtlgt2__test_oa__counter9__read \
    pvc__compute_basic__sysmem_transaction_write__read
#define mtlgt3__render_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define mtlgt3__render_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define mtlgt3__render_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define mtlgt3__render_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define mtlgt3__render_basic__vs_threads__read \
    tglgt1__render_basic__vs_threads__read
#define mtlgt3__render_basic__hs_threads__read \
    tglgt1__render_basic__hs_threads__read
#define mtlgt3__render_basic__ds_threads__read \
    tglgt1__render_basic__ds_threads__read
#define mtlgt3__render_basic__gs_threads__read \
    tglgt1__render_basic__gs_threads__read
#define mtlgt3__render_basic__ps_threads__read \
    tglgt1__render_basic__ps_threads__read
#define mtlgt3__render_basic__cs_threads__read \
    tglgt1__render_basic__cs_threads__read
#define mtlgt3__render_basic__gpu_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define mtlgt3__render_basic__xve_active__read \
    acmgt1__render_basic__xve_active__read
#define mtlgt3__render_basic__xve_stall__read \
    acmgt1__render_basic__xve_stall__read
#define mtlgt3__render_basic__xve_thread_occupancy__read \
    acmgt1__render_basic__xve_thread_occupancy__read
#define mtlgt3__render_basic__xve_fpu_em_active__read \
    acmgt1__render_basic__xve_fpu_em_active__read
#define mtlgt3__render_basic__vs_fpu_active__read \
    acmgt1__render_basic__vs_fpu_active__read
#define mtlgt3__render_basic__vs_em_active__read \
    acmgt1__render_basic__vs_em_active__read
#define mtlgt3__render_basic__vs_send_active__read \
    acmgt1__render_basic__vs_send_active__read
#define mtlgt3__render_basic__ps_fpu_active__read \
    acmgt1__render_basic__ps_fpu_active__read
#define mtlgt3__render_basic__ps_em_active__read \
    acmgt1__render_basic__ps_em_active__read
#define mtlgt3__render_basic__ps_send_active__read \
    acmgt1__render_basic__ps_send_active__read
#define mtlgt3__render_basic__rasterized_pixels__read \
    tglgt1__render_basic__rasterized_pixels__read
#define mtlgt3__render_basic__hi_depth_test_fails__read \
    tglgt1__render_basic__hi_depth_test_fails__read
#define mtlgt3__render_basic__early_depth_test_fails__read \
    tglgt1__render_basic__early_depth_test_fails__read
#define mtlgt3__render_basic__samples_killed_in_ps__read \
    tglgt1__render_basic__samples_killed_in_ps__read
#define mtlgt3__render_basic__pixels_failing_post_ps_tests__read \
    tglgt1__render_basic__pixels_failing_post_ps_tests__read
#define mtlgt3__render_basic__samples_written__read \
    tglgt1__render_basic__samples_written__read
#define mtlgt3__render_basic__samples_blended__read \
    tglgt1__render_basic__samples_blended__read
#define mtlgt3__render_basic__sampler_texels__read \
    tglgt1__render_basic__sampler_texels__read
#define mtlgt3__render_basic__sampler_texel_misses__read \
    tglgt1__render_basic__sampler_texel_misses__read
#define mtlgt3__render_basic__slm_reads__read \
    acmgt1__render_basic__slm_reads__read
#define mtlgt3__render_basic__slm_reads__max \
    acmgt1__render_basic__slm_reads__max

#define mtlgt3__render_basic__slm_writes__read \
    acmgt1__render_basic__slm_writes__read
#define mtlgt3__render_basic__slm_writes__max \
    acmgt1__render_basic__slm_reads__max

#define mtlgt3__render_basic__shader_memory_accesses__read \
    tglgt1__render_basic__shader_memory_accesses__read
#define mtlgt3__render_basic__shader_atomics__read \
    tglgt1__render_basic__shader_atomics__read
#define mtlgt3__render_basic__shader_barriers__read \
    tglgt1__render_basic__shader_barriers__read
#define mtlgt3__render_basic__gti_read_throughput__read \
    mtlgt2__render_basic__gti_read_throughput__read
#define mtlgt3__render_basic__gti_read_throughput__max \
    acmgt1__render_basic__gti_read_throughput__max

#define mtlgt3__render_basic__gti_write_throughput__read \
    mtlgt2__render_basic__gti_write_throughput__read
#define mtlgt3__render_basic__gti_write_throughput__max \
    acmgt1__render_basic__gti_read_throughput__max

#define mtlgt3__render_basic__samplers_busy__read \
    acmgt2__render_basic__sampler20_busy__read
#define mtlgt3__render_basic__sampler_bottleneck__read \
    acmgt2__render_basic__sampler20_bottleneck__read
#define mtlgt3__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define mtlgt3__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define mtlgt3__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define mtlgt3__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define mtlgt3__test_oa__counter0__read \
    tglgt1__test_oa__counter0__read
#define mtlgt3__test_oa__counter1__read \
    tglgt1__test_oa__counter1__read
#define mtlgt3__test_oa__counter2__read \
    tglgt1__test_oa__counter2__read
#define mtlgt3__test_oa__counter3__read \
    tglgt1__test_oa__counter3__read
#define mtlgt3__test_oa__counter4__read \
    tglgt1__test_oa__counter4__read
#define mtlgt3__test_oa__counter5__read \
    tglgt1__test_oa__counter5__read
#define mtlgt3__test_oa__counter6__read \
    tglgt1__test_oa__counter6__read
#define mtlgt3__test_oa__counter7__read \
    tglgt1__test_oa__counter7__read
#define mtlgt3__test_oa__counter8__read \
    tglgt1__test_oa__counter8__read
#define mtlgt3__test_oa__counter9__read \
    tglgt1__test_oa__counter9__read
#define lnl__render_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__render_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__render_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__render_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

double
lnl__render_basic__gpu_busy__read(const struct intel_xe_perf *perf,
                                  const struct intel_xe_perf_metric_set *metric_set,
                                  uint64_t *accumulator);
uint64_t
lnl__render_basic__ia_vertex__read(const struct intel_xe_perf *perf,
                                   const struct intel_xe_perf_metric_set *metric_set,
                                   uint64_t *accumulator);
uint64_t
lnl__render_basic__gpgpu_threadgroup_count__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
uint64_t
lnl__render_basic__async_gpgpu_threadgroup_count__read(const struct intel_xe_perf *perf,
                                                       const struct intel_xe_perf_metric_set *metric_set,
                                                       uint64_t *accumulator);
uint64_t
lnl__render_basic__rasterizer_sample_output__read(const struct intel_xe_perf *perf,
                                                  const struct intel_xe_perf_metric_set *metric_set,
                                                  uint64_t *accumulator);
uint64_t
lnl__render_basic__pixel_blend__read(const struct intel_xe_perf *perf,
                                     const struct intel_xe_perf_metric_set *metric_set,
                                     uint64_t *accumulator);
uint64_t
lnl__render_basic__pixel_write__read(const struct intel_xe_perf *perf,
                                     const struct intel_xe_perf_metric_set *metric_set,
                                     uint64_t *accumulator);
uint64_t
lnl__render_basic__postps_alpha_test_fail__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
uint64_t
lnl__render_basic__shader_pix_kill__read(const struct intel_xe_perf *perf,
                                         const struct intel_xe_perf_metric_set *metric_set,
                                         uint64_t *accumulator);
uint64_t
lnl__render_basic__l3_read__read(const struct intel_xe_perf *perf,
                                 const struct intel_xe_perf_metric_set *metric_set,
                                 uint64_t *accumulator);
uint64_t
lnl__render_basic__l3_write__read(const struct intel_xe_perf *perf,
                                  const struct intel_xe_perf_metric_set *metric_set,
                                  uint64_t *accumulator);
double
lnl__render_basic__command_parser_compute_engine_busy__read(const struct intel_xe_perf *perf,
                                                            const struct intel_xe_perf_metric_set *metric_set,
                                                            uint64_t *accumulator);
double
lnl__render_basic__command_parser_render_engine_busy__read(const struct intel_xe_perf *perf,
                                                           const struct intel_xe_perf_metric_set *metric_set,
                                                           uint64_t *accumulator);
double
lnl__render_basic__command_parser_copy_engine_busy__read(const struct intel_xe_perf *perf,
                                                         const struct intel_xe_perf_metric_set *metric_set,
                                                         uint64_t *accumulator);
uint64_t
lnl__render_basic__clipper_input_vertex__read(const struct intel_xe_perf *perf,
                                              const struct intel_xe_perf_metric_set *metric_set,
                                              uint64_t *accumulator);
uint64_t
lnl__render_basic__clipper_primitive_cull__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
uint64_t
lnl__render_basic__clipper_primitive_far_near_clip__read(const struct intel_xe_perf *perf,
                                                         const struct intel_xe_perf_metric_set *metric_set,
                                                         uint64_t *accumulator);
uint64_t
lnl__render_basic__clipper_primitive_output__read(const struct intel_xe_perf *perf,
                                                  const struct intel_xe_perf_metric_set *metric_set,
                                                  uint64_t *accumulator);
uint64_t
lnl__render_basic__ia_primitive__read(const struct intel_xe_perf *perf,
                                      const struct intel_xe_perf_metric_set *metric_set,
                                      uint64_t *accumulator);
uint64_t
lnl__render_basic__streamout_output_vertex_count__read(const struct intel_xe_perf *perf,
                                                       const struct intel_xe_perf_metric_set *metric_set,
                                                       uint64_t *accumulator);
uint64_t
lnl__render_basic__stripsfan_object_count__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
uint64_t
lnl__render_basic__stripsfan_object_cull__read(const struct intel_xe_perf *perf,
                                               const struct intel_xe_perf_metric_set *metric_set,
                                               uint64_t *accumulator);
uint64_t
lnl__render_basic__streamout_primitive_write_count__read(const struct intel_xe_perf *perf,
                                                         const struct intel_xe_perf_metric_set *metric_set,
                                                         uint64_t *accumulator);
uint64_t
lnl__render_basic__slm_bank_conflict_count__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
uint64_t
lnl__render_basic__compressor_input__read(const struct intel_xe_perf *perf,
                                          const struct intel_xe_perf_metric_set *metric_set,
                                          uint64_t *accumulator);
uint64_t
lnl__render_basic__compressor_output__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
uint64_t
lnl__render_basic__tlb_miss__read(const struct intel_xe_perf *perf,
                                  const struct intel_xe_perf_metric_set *metric_set,
                                  uint64_t *accumulator);
double
lnl__render_basic__gpu_memory_request_queue_full__read(const struct intel_xe_perf *perf,
                                                       const struct intel_xe_perf_metric_set *metric_set,
                                                       uint64_t *accumulator);
uint64_t
lnl__render_basic__sampler_2_x2_read__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
uint64_t
lnl__render_basic__sampler_texture_cache_access__read(const struct intel_xe_perf *perf,
                                                      const struct intel_xe_perf_metric_set *metric_set,
                                                      uint64_t *accumulator);
uint64_t
lnl__render_basic__sampler_texture_cache_miss__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
uint64_t
lnl__render_basic__urb_read__read(const struct intel_xe_perf *perf,
                                  const struct intel_xe_perf_metric_set *metric_set,
                                  uint64_t *accumulator);
uint64_t
lnl__render_basic__urb_write__read(const struct intel_xe_perf *perf,
                                   const struct intel_xe_perf_metric_set *metric_set,
                                   uint64_t *accumulator);
uint64_t
lnl__render_basic__icache_hit__read(const struct intel_xe_perf *perf,
                                    const struct intel_xe_perf_metric_set *metric_set,
                                    uint64_t *accumulator);
uint64_t
lnl__render_basic__icache_miss__read(const struct intel_xe_perf *perf,
                                     const struct intel_xe_perf_metric_set *metric_set,
                                     uint64_t *accumulator);
double
lnl__render_basic__xve_active__read(const struct intel_xe_perf *perf,
                                    const struct intel_xe_perf_metric_set *metric_set,
                                    uint64_t *accumulator);
uint64_t
lnl__render_basic__xve_inst_executed_alu0_all__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
uint64_t
lnl__render_basic__xve_inst_executed_alu1_all__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
uint64_t
lnl__render_basic__xve_inst_executed_send_all__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
uint64_t
lnl__render_basic__xve_inst_executed_alu0_cs__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
uint64_t
lnl__render_basic__xve_inst_executed_alu0_ps__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
uint64_t
lnl__render_basic__xve_inst_executed_alu0_vs__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
uint64_t
lnl__render_basic__xve_inst_executed_alu1_cs__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
uint64_t
lnl__render_basic__xve_inst_executed_alu1_ps__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
uint64_t
lnl__render_basic__xve_inst_executed_alu1_vs__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
double
lnl__render_basic__xve_shared_function_access_hold__read(const struct intel_xe_perf *perf,
                                                         const struct intel_xe_perf_metric_set *metric_set,
                                                         uint64_t *accumulator);
uint64_t
lnl__render_basic__rt_bvh_cache_miss__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
uint64_t
lnl__render_basic__rt_input_message_ray_count__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
uint64_t
lnl__render_basic__load_store_cache_hit__read(const struct intel_xe_perf *perf,
                                              const struct intel_xe_perf_metric_set *metric_set,
                                              uint64_t *accumulator);
uint64_t
lnl__render_basic__load_store_cache_access__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
double
lnl__render_basic__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
uint64_t
lnl__render_basic__xve_inst_issued_all__read(const struct intel_xe_perf *perf,
                                             const struct intel_xe_perf_metric_set *metric_set,
                                             uint64_t *accumulator);
uint64_t
lnl__render_basic__gpu_memory_byte_read__read(const struct intel_xe_perf *perf,
                                              const struct intel_xe_perf_metric_set *metric_set,
                                              uint64_t *accumulator);
uint64_t
lnl__render_basic__gpu_memory_byte_write__read(const struct intel_xe_perf *perf,
                                               const struct intel_xe_perf_metric_set *metric_set,
                                               uint64_t *accumulator);
uint64_t
lnl__render_basic__load_store_cache_byte_read__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
uint64_t
lnl__render_basic__load_store_cache_byte_write__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
uint64_t
lnl__render_basic__slm_byte_read__read(const struct intel_xe_perf *perf,
                                       const struct intel_xe_perf_metric_set *metric_set,
                                       uint64_t *accumulator);
uint64_t
lnl__render_basic__slm_byte_write__read(const struct intel_xe_perf *perf,
                                        const struct intel_xe_perf_metric_set *metric_set,
                                        uint64_t *accumulator);
double
lnl__render_basic__gpu_memory_byte_read_rate__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
double
lnl__render_basic__gpu_memory_byte_write_rate__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
double
lnl__render_basic__xve_stall__read(const struct intel_xe_perf *perf,
                                   const struct intel_xe_perf_metric_set *metric_set,
                                   uint64_t *accumulator);
double
lnl__render_basic__xve_inst_executed_alu0_all_utilization__read(const struct intel_xe_perf *perf,
                                                                const struct intel_xe_perf_metric_set *metric_set,
                                                                uint64_t *accumulator);
double
lnl__render_basic__xve_inst_executed_alu1_all_utilization__read(const struct intel_xe_perf *perf,
                                                                const struct intel_xe_perf_metric_set *metric_set,
                                                                uint64_t *accumulator);
#define lnl__compute_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__compute_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__compute_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__compute_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define lnl__compute_basic__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define lnl__compute_basic__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define lnl__compute_basic__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define lnl__compute_basic__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define lnl__compute_basic__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define lnl__compute_basic__icache_hit__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define lnl__compute_basic__icache_miss__read \
    lnl__render_basic__shader_pix_kill__read
double
lnl__compute_basic__xve_active__read(const struct intel_xe_perf *perf,
                                     const struct intel_xe_perf_metric_set *metric_set,
                                     uint64_t *accumulator);
#define lnl__compute_basic__xve_inst_executed_alu0_all__read \
    lnl__render_basic__sampler_2_x2_read__read
#define lnl__compute_basic__xve_inst_executed_alu1_all__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define lnl__compute_basic__xve_inst_executed_send_all__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define lnl__compute_basic__xve_inst_issued_all__read \
    lnl__render_basic__sampler_texture_cache_miss__read
double
lnl__compute_basic__xve_shared_function_access_hold__read(const struct intel_xe_perf *perf,
                                                          const struct intel_xe_perf_metric_set *metric_set,
                                                          uint64_t *accumulator);
double
lnl__compute_basic__xve_stall__read(const struct intel_xe_perf *perf,
                                    const struct intel_xe_perf_metric_set *metric_set,
                                    uint64_t *accumulator);
double
lnl__compute_basic__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
uint64_t
lnl__compute_basic__xve_inst_executed_alu2_all__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
#define lnl__compute_basic__xve_multiple_pipe_active__read \
    lnl__render_basic__xve_inst_executed_alu0_all_utilization__read
#define lnl__compute_basic__load_store_cache_partial_write_count__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
uint64_t
lnl__compute_basic__slm_bank_conflict_count__read(const struct intel_xe_perf *perf,
                                                  const struct intel_xe_perf_metric_set *metric_set,
                                                  uint64_t *accumulator);
#define lnl__compute_basic__slm_byte_read__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define lnl__compute_basic__slm_byte_write__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define lnl__compute_basic__load_store_cache_byte_read__read \
    lnl__render_basic__load_store_cache_hit__read
#define lnl__compute_basic__load_store_cache_byte_write__read \
    lnl__render_basic__load_store_cache_access__read
#define lnl__compute_basic__load_store_cache_access__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define lnl__compute_basic__load_store_cache_hit__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define lnl__compute_basic__l3_atomic_access__read \
    lnl__render_basic__pixel_blend__read
#define lnl__compute_basic__l3_hit__read \
    lnl__render_basic__pixel_write__read
#define lnl__compute_basic__l3_miss__read \
    lnl__render_basic__l3_read__read
#define lnl__compute_basic__l3_read__read \
    lnl__render_basic__l3_write__read
uint64_t
lnl__compute_basic__l3_write__read(const struct intel_xe_perf *perf,
                                   const struct intel_xe_perf_metric_set *metric_set,
                                   uint64_t *accumulator);
double
lnl__compute_basic__l3_stall__read(const struct intel_xe_perf *perf,
                                   const struct intel_xe_perf_metric_set *metric_set,
                                   uint64_t *accumulator);
uint64_t
lnl__compute_basic__compressor_input__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
#define lnl__compute_basic__compressor_output__read \
    lnl__render_basic__clipper_input_vertex__read
uint64_t
lnl__compute_basic__gpu_memory_byte_read__read(const struct intel_xe_perf *perf,
                                               const struct intel_xe_perf_metric_set *metric_set,
                                               uint64_t *accumulator);
uint64_t
lnl__compute_basic__gpu_memory_byte_write__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
double
lnl__compute_basic__gpu_memory_byte_read_rate__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
double
lnl__compute_basic__gpu_memory_byte_write_rate__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
#define lnl__compute_basic__gpu_memory_l3_read__read \
    lnl__render_basic__clipper_primitive_output__read
#define lnl__compute_basic__gpu_memory_l3_write__read \
    lnl__render_basic__ia_primitive__read
double
lnl__compute_basic__gpu_memory_request_queue_full__read(const struct intel_xe_perf *perf,
                                                        const struct intel_xe_perf_metric_set *metric_set,
                                                        uint64_t *accumulator);
#define lnl__compute_basic__tlb_miss__read \
    lnl__render_basic__stripsfan_object_count__read
#define lnl__compute_basic__async_gpgpu_thread_exit_count__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
double
lnl__compute_basic__gpgpu_dispatch__read(const struct intel_xe_perf *perf,
                                         const struct intel_xe_perf_metric_set *metric_set,
                                         uint64_t *accumulator);
double
lnl__compute_basic__command_parser_compute_engine_busy__read(const struct intel_xe_perf *perf,
                                                             const struct intel_xe_perf_metric_set *metric_set,
                                                             uint64_t *accumulator);
#define lnl__compute_basic__command_parser_compute_engine_dispatch_kernel_count__read \
    lnl__render_basic__streamout_primitive_write_count__read
double
lnl__compute_basic__command_parser_copy_engine_busy__read(const struct intel_xe_perf *perf,
                                                          const struct intel_xe_perf_metric_set *metric_set,
                                                          uint64_t *accumulator);
#define lnl__compute_basic__command_parser_flush_count__read \
    lnl__render_basic__compressor_output__read
double
lnl__compute_basic__command_parser_render_engine_busy__read(const struct intel_xe_perf *perf,
                                                            const struct intel_xe_perf_metric_set *metric_set,
                                                            uint64_t *accumulator);
uint64_t
lnl__compute_basic__command_parser_render_engine_dispatch_kernel_count__read(const struct intel_xe_perf *perf,
                                                                             const struct intel_xe_perf_metric_set *metric_set,
                                                                             uint64_t *accumulator);
double
lnl__compute_basic__xve_pipe_alu0_and_alu1_active__read(const struct intel_xe_perf *perf,
                                                        const struct intel_xe_perf_metric_set *metric_set,
                                                        uint64_t *accumulator);
double
lnl__compute_basic__xve_pipe_alu0_and_alu2_active__read(const struct intel_xe_perf *perf,
                                                        const struct intel_xe_perf_metric_set *metric_set,
                                                        uint64_t *accumulator);
double
lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read(const struct intel_xe_perf *perf,
                                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                                 uint64_t *accumulator);
double
lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read(const struct intel_xe_perf *perf,
                                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                                 uint64_t *accumulator);
#define lnl__compute_basic__xve_inst_executed_alu2_all_utilization__read \
    lnl__render_basic__xve_active__read
#define lnl__depth_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__depth_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__depth_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__depth_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define lnl__depth_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define lnl__depth_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define lnl__depth_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define lnl__depth_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define lnl__depth_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define lnl__depth_profile__early_depth_stencil_test_fail_np__read \
    lnl__render_basic__pixel_blend__read
#define lnl__depth_profile__early_depth_stencil_test_fail_p__read \
    lnl__render_basic__pixel_write__read
#define lnl__depth_profile__hiz_depth_test_ambig_np__read \
    lnl__render_basic__l3_read__read
#define lnl__depth_profile__hiz_depth_test_ambig_p__read \
    lnl__render_basic__l3_write__read
#define lnl__depth_profile__hiz_depth_test_fail_np__read \
    lnl__compute_basic__l3_write__read
uint64_t
lnl__depth_profile__hiz_depth_test_fail_p__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
#define lnl__depth_profile__hiz_depth_test_pass_p__read \
    lnl__compute_basic__compressor_input__read
double
lnl__depth_profile__hiz_subspan_latency_fifofull__read(const struct intel_xe_perf *perf,
                                                       const struct intel_xe_perf_metric_set *metric_set,
                                                       uint64_t *accumulator);
double
lnl__depth_profile__iz_output_ready__read(const struct intel_xe_perf *perf,
                                          const struct intel_xe_perf_metric_set *metric_set,
                                          uint64_t *accumulator);
double
lnl__depth_profile__iz_subspan_latency_fifofull__read(const struct intel_xe_perf *perf,
                                                      const struct intel_xe_perf_metric_set *metric_set,
                                                      uint64_t *accumulator);
#define lnl__depth_profile__postps_depth_stencil_test_fail__read \
    lnl__render_basic__clipper_primitive_output__read
#define lnl__depth_profile__render_cache_alloc__read \
    lnl__render_basic__ia_primitive__read
#define lnl__depth_profile__render_cache_hit__read \
    lnl__render_basic__streamout_output_vertex_count__read
#define lnl__depth_profile__render_cache_read__read \
    lnl__render_basic__stripsfan_object_count__read
#define lnl__depth_profile__render_cache_write__read \
    lnl__render_basic__stripsfan_object_cull__read
#define lnl__depth_profile__urb_cross_slice_read__read \
    lnl__render_basic__streamout_primitive_write_count__read
#define lnl__depth_profile__pixel_2_x2_lit_post_rasterizer_early_depth__read \
    lnl__render_basic__compressor_input__read
#define lnl__depth_profile__pixel_2_x2_lit_post_rasterizer_late_depth__read \
    lnl__render_basic__compressor_output__read
double
lnl__depth_profile__gpu_memory_active__read(const struct intel_xe_perf *perf,
                                            const struct intel_xe_perf_metric_set *metric_set,
                                            uint64_t *accumulator);
#define lnl__device_cache_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__device_cache_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__device_cache_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__device_cache_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define lnl__device_cache_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define lnl__device_cache_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define lnl__device_cache_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define lnl__device_cache_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define lnl__device_cache_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define lnl__device_cache_profile__amfs_l3_access__read \
    lnl__render_basic__pixel_blend__read
#define lnl__device_cache_profile__amfs_l3_atomic__read \
    lnl__render_basic__pixel_write__read
#define lnl__device_cache_profile__amfs_l3_hit__read \
    lnl__render_basic__l3_read__read
#define lnl__device_cache_profile__amfs_l3_write__read \
    lnl__render_basic__l3_write__read
#define lnl__device_cache_profile__color_l3_access__read \
    lnl__compute_basic__l3_write__read
#define lnl__device_cache_profile__color_l3_hit__read \
    lnl__depth_profile__hiz_depth_test_fail_p__read
#define lnl__device_cache_profile__icache_l3_hit__read \
    lnl__compute_basic__compressor_input__read
#define lnl__device_cache_profile__icache_l3_read__read \
    lnl__render_basic__clipper_input_vertex__read
#define lnl__device_cache_profile__load_store_cache_l3_hit__read \
    lnl__render_basic__clipper_primitive_cull__read
#define lnl__device_cache_profile__load_store_cache_l3_read__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
#define lnl__device_cache_profile__load_store_cache_l3_write__read \
    lnl__render_basic__clipper_primitive_output__read
#define lnl__device_cache_profile__sampler_l3_hit__read \
    lnl__render_basic__ia_primitive__read
#define lnl__device_cache_profile__sampler_l3_read__read \
    lnl__render_basic__streamout_output_vertex_count__read
#define lnl__device_cache_profile__z_l3_access__read \
    lnl__render_basic__stripsfan_object_count__read
#define lnl__device_cache_profile__z_l3_hit__read \
    lnl__render_basic__stripsfan_object_cull__read
double
lnl__device_cache_profile__l3_busy__read(const struct intel_xe_perf *perf,
                                         const struct intel_xe_perf_metric_set *metric_set,
                                         uint64_t *accumulator);
double
lnl__device_cache_profile__l3_input_available__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
double
lnl__device_cache_profile__l3_output_ready__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
double
lnl__device_cache_profile__l3_superq_full__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
#define lnl__device_cache_profile__l3_atomic_access__read \
    lnl__compute_basic__command_parser_render_engine_dispatch_kernel_count__read
#define lnl__device_cache_profile__l3_hit__read \
    lnl__render_basic__urb_read__read
#define lnl__device_cache_profile__l3_miss__read \
    lnl__render_basic__urb_write__read
uint64_t
lnl__device_cache_profile__l3_read__read(const struct intel_xe_perf *perf,
                                         const struct intel_xe_perf_metric_set *metric_set,
                                         uint64_t *accumulator);
double
lnl__device_cache_profile__l3_stall__read(const struct intel_xe_perf *perf,
                                          const struct intel_xe_perf_metric_set *metric_set,
                                          uint64_t *accumulator);
uint64_t
lnl__device_cache_profile__l3_write__read(const struct intel_xe_perf *perf,
                                          const struct intel_xe_perf_metric_set *metric_set,
                                          uint64_t *accumulator);
uint64_t
lnl__device_cache_profile__gpu_memory_l3_read__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
uint64_t
lnl__device_cache_profile__gpu_memory_l3_write__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
uint64_t
lnl__device_cache_profile__gpu_memory_read__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
uint64_t
lnl__device_cache_profile__gpu_memory_write__read(const struct intel_xe_perf *perf,
                                                  const struct intel_xe_perf_metric_set *metric_set,
                                                  uint64_t *accumulator);
#define lnl__memory_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__memory_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__memory_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__memory_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define lnl__memory_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define lnl__memory_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define lnl__memory_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define lnl__memory_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define lnl__memory_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define lnl__memory_profile__compressor_input__read \
    lnl__render_basic__pixel_blend__read
#define lnl__memory_profile__compressor_output__read \
    lnl__render_basic__pixel_write__read
#define lnl__memory_profile__gpu_memory_32_b_transaction_read__read \
    lnl__render_basic__l3_read__read
#define lnl__memory_profile__gpu_memory_32_b_transaction_write__read \
    lnl__render_basic__l3_write__read
#define lnl__memory_profile__gpu_memory_64_b_transaction_read__read \
    lnl__compute_basic__l3_write__read
#define lnl__memory_profile__gpu_memory_64_b_transaction_write__read \
    lnl__depth_profile__hiz_depth_test_fail_p__read
uint64_t
lnl__memory_profile__gpu_memory_byte_read__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
uint64_t
lnl__memory_profile__gpu_memory_byte_write__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
double
lnl__memory_profile__gpu_memory_byte_read_rate__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
double
lnl__memory_profile__gpu_memory_byte_write_rate__read(const struct intel_xe_perf *perf,
                                                      const struct intel_xe_perf_metric_set *metric_set,
                                                      uint64_t *accumulator);
#define lnl__memory_profile__gpu_memory_l3_read__read \
    lnl__render_basic__clipper_primitive_cull__read
#define lnl__memory_profile__gpu_memory_l3_write__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
double
lnl__memory_profile__gpu_memory_request_queue_full__read(const struct intel_xe_perf *perf,
                                                         const struct intel_xe_perf_metric_set *metric_set,
                                                         uint64_t *accumulator);
#define lnl__memory_profile__tlb_miss__read \
    lnl__render_basic__ia_primitive__read
#define lnl__memory_profile__l3_atomic_access__read \
    lnl__render_basic__streamout_output_vertex_count__read
double
lnl__memory_profile__l3_busy__read(const struct intel_xe_perf *perf,
                                   const struct intel_xe_perf_metric_set *metric_set,
                                   uint64_t *accumulator);
#define lnl__memory_profile__l3_hit__read \
    lnl__render_basic__stripsfan_object_cull__read
#define lnl__memory_profile__l3_input_available__read \
    lnl__device_cache_profile__l3_busy__read
#define lnl__memory_profile__l3_miss__read \
    lnl__render_basic__compressor_input__read
#define lnl__memory_profile__l3_output_ready__read \
    lnl__device_cache_profile__l3_output_ready__read
#define lnl__memory_profile__l3_read__read \
    lnl__render_basic__tlb_miss__read
double
lnl__memory_profile__l3_stall__read(const struct intel_xe_perf *perf,
                                    const struct intel_xe_perf_metric_set *metric_set,
                                    uint64_t *accumulator);
double
lnl__memory_profile__l3_superq_full__read(const struct intel_xe_perf *perf,
                                          const struct intel_xe_perf_metric_set *metric_set,
                                          uint64_t *accumulator);
#define lnl__memory_profile__l3_write__read \
    lnl__render_basic__urb_write__read
#define lnl__memory_profile__load_store_cache_access__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define lnl__memory_profile__load_store_cache_byte_read__read \
    lnl__render_basic__shader_pix_kill__read
#define lnl__memory_profile__load_store_cache_byte_write__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define lnl__memory_profile__load_store_cache_hit__read \
    lnl__render_basic__sampler_2_x2_read__read
double
lnl__memory_profile__load_store_cache_input_available__read(const struct intel_xe_perf *perf,
                                                            const struct intel_xe_perf_metric_set *metric_set,
                                                            uint64_t *accumulator);
#define lnl__memory_profile__load_store_cache_number_of_bank_access_count__read \
    lnl__render_basic__sampler_texture_cache_miss__read
double
lnl__memory_profile__load_store_cache_output_ready__read(const struct intel_xe_perf *perf,
                                                         const struct intel_xe_perf_metric_set *metric_set,
                                                         uint64_t *accumulator);
#define lnl__memory_profile__load_store_cache_partial_write_count__read \
    lnl__render_basic__icache_miss__read
#define lnl__memory_profile__slm_access_count__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define lnl__memory_profile__slm_bank_conflict_count__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define lnl__memory_profile__slm_byte_read__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define lnl__memory_profile__slm_byte_write__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define lnl__memory_profile__xve_load_store_cache_atomic_message_count__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define lnl__memory_profile__xve_load_store_cache_fence_message_count__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define lnl__memory_profile__xve_load_store_cache_read_message_count__read \
    lnl__render_basic__load_store_cache_hit__read
#define lnl__memory_profile__xve_load_store_cache_register_request_count__read \
    lnl__render_basic__load_store_cache_access__read
#define lnl__memory_profile__xve_load_store_cache_register_response_count__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define lnl__memory_profile__xve_load_store_cache_write_message_count__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define lnl__memory_profile__xve_slm_atomic_message_count__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define lnl__memory_profile__xve_slm_fence_message_count__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define lnl__memory_profile__xve_slm_read_message_count__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define lnl__memory_profile__xve_slm_write_message_count__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define lnl__memory_profile__copy_engine_read_request__read \
    lnl__device_cache_profile__l3_read__read
double
lnl__memory_profile__copy_engine_request_stall__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
#define lnl__memory_profile__copy_engine_write_request__read \
    lnl__device_cache_profile__l3_write__read
#define lnl__render_pipe_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__render_pipe_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__render_pipe_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__render_pipe_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define lnl__render_pipe_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define lnl__render_pipe_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define lnl__render_pipe_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define lnl__render_pipe_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define lnl__render_pipe_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
double
lnl__render_pipe_profile__clipper_input_available__read(const struct intel_xe_perf *perf,
                                                        const struct intel_xe_perf_metric_set *metric_set,
                                                        uint64_t *accumulator);
double
lnl__render_pipe_profile__clipper_output_ready__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
#define lnl__render_pipe_profile__clipper_transaction_output__read \
    lnl__render_basic__l3_read__read
#define lnl__render_pipe_profile__streamout_primitive_storage_need__read \
    lnl__render_basic__l3_write__read
double
lnl__render_pipe_profile__stripsfan_output_ready__read(const struct intel_xe_perf *perf,
                                                       const struct intel_xe_perf_metric_set *metric_set,
                                                       uint64_t *accumulator);
double
lnl__render_pipe_profile__vertex_fetch_input_available__read(const struct intel_xe_perf *perf,
                                                             const struct intel_xe_perf_metric_set *metric_set,
                                                             uint64_t *accumulator);
double
lnl__render_pipe_profile__vertex_fetch_output_ready__read(const struct intel_xe_perf *perf,
                                                          const struct intel_xe_perf_metric_set *metric_set,
                                                          uint64_t *accumulator);
double
lnl__render_pipe_profile__vs_output_ready__read(const struct intel_xe_perf *perf,
                                                const struct intel_xe_perf_metric_set *metric_set,
                                                uint64_t *accumulator);
double
lnl__render_pipe_profile__color_pipe_cache_latency1_stall__read(const struct intel_xe_perf *perf,
                                                                const struct intel_xe_perf_metric_set *metric_set,
                                                                uint64_t *accumulator);
double
lnl__render_pipe_profile__color_pipe_cache_latency2_stall__read(const struct intel_xe_perf *perf,
                                                                const struct intel_xe_perf_metric_set *metric_set,
                                                                uint64_t *accumulator);
double
lnl__render_pipe_profile__pixel_post_process_input_available__read(const struct intel_xe_perf *perf,
                                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                                   uint64_t *accumulator);
double
lnl__render_pipe_profile__pixel_post_process_output_ready__read(const struct intel_xe_perf *perf,
                                                                const struct intel_xe_perf_metric_set *metric_set,
                                                                uint64_t *accumulator);
double
lnl__render_pipe_profile__ps_output_available__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
double
lnl__render_pipe_profile__render_cache_input_available__read(const struct intel_xe_perf *perf,
                                                             const struct intel_xe_perf_metric_set *metric_set,
                                                             uint64_t *accumulator);
double
lnl__render_pipe_profile__render_cache_output_ready__read(const struct intel_xe_perf *perf,
                                                          const struct intel_xe_perf_metric_set *metric_set,
                                                          uint64_t *accumulator);
double
lnl__render_pipe_profile__amfs_stall_all_input__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
double
lnl__render_pipe_profile__amfs_stall_any_input__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
double
lnl__render_pipe_profile__sampler_active__read(const struct intel_xe_perf *perf,
                                               const struct intel_xe_perf_metric_set *metric_set,
                                               uint64_t *accumulator);
double
lnl__render_pipe_profile__sampler_input_available__read(const struct intel_xe_perf *perf,
                                                        const struct intel_xe_perf_metric_set *metric_set,
                                                        uint64_t *accumulator);
double
lnl__render_pipe_profile__sampler_memory_latency_stall__read(const struct intel_xe_perf *perf,
                                                             const struct intel_xe_perf_metric_set *metric_set,
                                                             uint64_t *accumulator);
#define lnl__render_pipe_profile__sampler_output_ready__read \
    lnl__memory_profile__load_store_cache_input_available__read
double
lnl__render_pipe_profile__rasterizer_input_available__read(const struct intel_xe_perf *perf,
                                                           const struct intel_xe_perf_metric_set *metric_set,
                                                           uint64_t *accumulator);
double
lnl__render_pipe_profile__rasterizer_output_ready__read(const struct intel_xe_perf *perf,
                                                        const struct intel_xe_perf_metric_set *metric_set,
                                                        uint64_t *accumulator);
#define lnl__render_pipe_profile__rasterizer_transaction_output__read \
    lnl__render_basic__tlb_miss__read
#define lnl__render_pipe_profile__task_thread_exit_count__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define lnl__render_pipe_profile__task_threadgroup_count__read \
    lnl__render_basic__icache_hit__read
double
lnl__render_pipe_profile__thread_dispatch_input_available__read(const struct intel_xe_perf *perf,
                                                                const struct intel_xe_perf_metric_set *metric_set,
                                                                uint64_t *accumulator);
double
lnl__render_pipe_profile__thread_dispatch_ps_active__read(const struct intel_xe_perf *perf,
                                                          const struct intel_xe_perf_metric_set *metric_set,
                                                          uint64_t *accumulator);
double
lnl__render_pipe_profile__thread_dispatch_queue0_active__read(const struct intel_xe_perf *perf,
                                                              const struct intel_xe_perf_metric_set *metric_set,
                                                              uint64_t *accumulator);
double
lnl__render_pipe_profile__thread_dispatch_queue0_stall__read(const struct intel_xe_perf *perf,
                                                             const struct intel_xe_perf_metric_set *metric_set,
                                                             uint64_t *accumulator);
double
lnl__render_pipe_profile__thread_dispatch_queue1_active__read(const struct intel_xe_perf *perf,
                                                              const struct intel_xe_perf_metric_set *metric_set,
                                                              uint64_t *accumulator);
double
lnl__render_pipe_profile__thread_dispatch_queue1_stall__read(const struct intel_xe_perf *perf,
                                                             const struct intel_xe_perf_metric_set *metric_set,
                                                             uint64_t *accumulator);
double
lnl__render_pipe_profile__threadgroup_dispatch_queue0_resource_stall__read(const struct intel_xe_perf *perf,
                                                                           const struct intel_xe_perf_metric_set *metric_set,
                                                                           uint64_t *accumulator);
double
lnl__render_pipe_profile__threadgroup_dispatch_queue1_resource_stall__read(const struct intel_xe_perf *perf,
                                                                           const struct intel_xe_perf_metric_set *metric_set,
                                                                           uint64_t *accumulator);
#define lnl__render_pipe_profile__command_parser_render_engine_draw_count__read \
    lnl__compute_basic__command_parser_render_engine_dispatch_kernel_count__read
#define lnl__render_pipe_profile__amfs_4_x4_shading_request__read \
    lnl__render_basic__urb_read__read
#define lnl__render_pipe_profile__amfs_cache_hit__read \
    lnl__render_basic__urb_write__read
#define lnl__render_pipe_profile__amfs_cache_miss__read \
    lnl__device_cache_profile__l3_read__read
#define lnl__rt_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__rt_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__rt_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__rt_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define lnl__rt_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define lnl__rt_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define lnl__rt_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define lnl__rt_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define lnl__rt_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define lnl__rt_profile__rt_any_hit_thread_ray_dispatch__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define lnl__rt_profile__rt_callable_thread_ray_dispatch__read \
    lnl__render_basic__shader_pix_kill__read
#define lnl__rt_profile__rt_closest_hit_thread_ray_dispatch__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define lnl__rt_profile__rt_input_message_spawn_count__read \
    lnl__render_basic__sampler_2_x2_read__read
#define lnl__rt_profile__rt_instance_node_ray_count__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define lnl__rt_profile__rt_internal_node_ray_count__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define lnl__rt_profile__rt_intersection_thread_ray_dispatch__read \
    lnl__render_basic__icache_hit__read
#define lnl__rt_profile__rt_message_stall__read \
    lnl__render_pipe_profile__thread_dispatch_input_available__read
#define lnl__rt_profile__rt_miss_thread_ray_dispatch__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define lnl__rt_profile__rt_procedural_node_ray_count__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define lnl__rt_profile__rt_quad_leaf_ray_count__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define lnl__rt_profile__rt_quad_test_ray_count__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define lnl__rt_profile__rt_request_collision__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_stall__read
#define lnl__rt_profile__rt_transform_ray_count__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define lnl__rt_profile__rt_traversal_input_ray_count__read \
    lnl__render_basic__load_store_cache_hit__read
#define lnl__rt_profile__rt_traversal_output_ray_count__read \
    lnl__render_basic__load_store_cache_access__read
double
lnl__rt_profile__rt_traversal_stall__read(const struct intel_xe_perf *perf,
                                          const struct intel_xe_perf_metric_set *metric_set,
                                          uint64_t *accumulator);
#define lnl__rt_profile__rt_traversal_step_ray_count__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define lnl__rt_profile__xve_inst_executed_alu0_rt_ahs__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define lnl__rt_profile__xve_inst_executed_alu0_rt_chs__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define lnl__rt_profile__xve_inst_executed_alu0_rt_ms__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define lnl__rt_profile__xve_inst_executed_alu1_rt_ahs__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define lnl__rt_profile__xve_inst_executed_alu1_rt_chs__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
uint64_t
lnl__rt_profile__xve_inst_executed_alu1_rt_ms__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
double
lnl__rt_profile__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
#define lnl__rt_profile__rt_bvh_cache_miss__read \
    lnl__render_basic__load_store_cache_byte_read__read
#define lnl__rt_profile__rt_input_message_ray_count__read \
    lnl__render_basic__load_store_cache_byte_write__read
#define lnl__rt_profile__rt_load_store_cache_read_message_count__read \
    lnl__render_basic__slm_byte_read__read
#define lnl__rt_profile__rt_load_store_cache_write_from_message_count__read \
    lnl__render_basic__slm_byte_write__read
#define lnl__vector_engine_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__vector_engine_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__vector_engine_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__vector_engine_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define lnl__vector_engine_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define lnl__vector_engine_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define lnl__vector_engine_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define lnl__vector_engine_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define lnl__vector_engine_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define lnl__vector_engine_profile__icache_hit__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define lnl__vector_engine_profile__icache_miss__read \
    lnl__render_basic__shader_pix_kill__read
#define lnl__vector_engine_profile__xve_active__read \
    lnl__compute_basic__xve_active__read
#define lnl__vector_engine_profile__xve_inst_executed_alu0_all__read \
    lnl__render_basic__sampler_2_x2_read__read
#define lnl__vector_engine_profile__xve_inst_executed_alu1_all__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define lnl__vector_engine_profile__xve_inst_executed_alu2_all__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define lnl__vector_engine_profile__xve_inst_executed_barrier__read \
    lnl__render_basic__icache_hit__read
#define lnl__vector_engine_profile__xve_inst_executed_bitconv__read \
    lnl__render_basic__icache_miss__read
#define lnl__vector_engine_profile__xve_inst_executed_control_all__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define lnl__vector_engine_profile__xve_inst_executed_fp16__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define lnl__vector_engine_profile__xve_inst_executed_fp32__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define lnl__vector_engine_profile__xve_inst_executed_fp64__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define lnl__vector_engine_profile__xve_inst_executed_fp64_2_nd__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define lnl__vector_engine_profile__xve_inst_executed_int16__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define lnl__vector_engine_profile__xve_inst_executed_int32__read \
    lnl__render_basic__load_store_cache_hit__read
#define lnl__vector_engine_profile__xve_inst_executed_int64__read \
    lnl__render_basic__load_store_cache_access__read
#define lnl__vector_engine_profile__xve_inst_executed_math__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define lnl__vector_engine_profile__xve_inst_executed_nondivergent__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define lnl__vector_engine_profile__xve_inst_executed_predication__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define lnl__vector_engine_profile__xve_inst_executed_send_all__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define lnl__vector_engine_profile__xve_inst_executed_xmx_bf16__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define lnl__vector_engine_profile__xve_inst_executed_xmx_fp16__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define lnl__vector_engine_profile__xve_inst_executed_xmx_int2__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
#define lnl__vector_engine_profile__xve_inst_executed_xmx_int4__read \
    lnl__rt_profile__xve_inst_executed_alu1_rt_ms__read
#define lnl__vector_engine_profile__xve_inst_executed_xmx_int8__read \
    lnl__render_basic__xve_inst_issued_all__read
#define lnl__vector_engine_profile__xve_inst_issued_all__read \
    lnl__render_basic__load_store_cache_byte_read__read
double
lnl__vector_engine_profile__xve_multiple_pipe_active__read(const struct intel_xe_perf *perf,
                                                           const struct intel_xe_perf_metric_set *metric_set,
                                                           uint64_t *accumulator);
double
lnl__vector_engine_profile__xve_pipe_alu0_and_alu1_active__read(const struct intel_xe_perf *perf,
                                                                const struct intel_xe_perf_metric_set *metric_set,
                                                                uint64_t *accumulator);
double
lnl__vector_engine_profile__xve_pipe_alu0_and_alu2_active__read(const struct intel_xe_perf *perf,
                                                                const struct intel_xe_perf_metric_set *metric_set,
                                                                uint64_t *accumulator);
double
lnl__vector_engine_profile__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                            const struct intel_xe_perf_metric_set *metric_set,
                                                            uint64_t *accumulator);
#define lnl__vector_engine_profile__l3_atomic_access__read \
    lnl__render_basic__pixel_blend__read
double
lnl__vector_engine_profile__l3_busy__read(const struct intel_xe_perf *perf,
                                          const struct intel_xe_perf_metric_set *metric_set,
                                          uint64_t *accumulator);
#define lnl__vector_engine_profile__l3_hit__read \
    lnl__render_basic__l3_read__read
double
lnl__vector_engine_profile__l3_input_available__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
#define lnl__vector_engine_profile__l3_miss__read \
    lnl__compute_basic__l3_write__read
#define lnl__vector_engine_profile__l3_output_ready__read \
    lnl__compute_basic__l3_stall__read
#define lnl__vector_engine_profile__l3_read__read \
    lnl__compute_basic__compressor_input__read
double
lnl__vector_engine_profile__l3_stall__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
double
lnl__vector_engine_profile__l3_superq_full__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
#define lnl__vector_engine_profile__l3_write__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
double
lnl__vector_engine_profile__command_parser_compute_engine_busy__read(const struct intel_xe_perf *perf,
                                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                                     uint64_t *accumulator);
#define lnl__vector_engine_profile__command_parser_compute_engine_dispatch_kernel_count__read \
    lnl__render_basic__ia_primitive__read
double
lnl__vector_engine_profile__command_parser_render_engine_busy__read(const struct intel_xe_perf *perf,
                                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                                    uint64_t *accumulator);
#define lnl__vector_engine_profile__command_parser_render_engine_dispatch_kernel_count__read \
    lnl__render_basic__stripsfan_object_count__read
#define lnl__vector_engine_profile__compressor_input__read \
    lnl__render_basic__stripsfan_object_cull__read
#define lnl__vector_engine_profile__compressor_output__read \
    lnl__render_basic__streamout_primitive_write_count__read
uint64_t
lnl__vector_engine_profile__gpu_memory_byte_read__read(const struct intel_xe_perf *perf,
                                                       const struct intel_xe_perf_metric_set *metric_set,
                                                       uint64_t *accumulator);
uint64_t
lnl__vector_engine_profile__gpu_memory_byte_write__read(const struct intel_xe_perf *perf,
                                                        const struct intel_xe_perf_metric_set *metric_set,
                                                        uint64_t *accumulator);
double
lnl__vector_engine_profile__gpu_memory_byte_read_rate__read(const struct intel_xe_perf *perf,
                                                            const struct intel_xe_perf_metric_set *metric_set,
                                                            uint64_t *accumulator);
double
lnl__vector_engine_profile__gpu_memory_byte_write_rate__read(const struct intel_xe_perf *perf,
                                                             const struct intel_xe_perf_metric_set *metric_set,
                                                             uint64_t *accumulator);
#define lnl__vector_engine_profile__tlb_miss__read \
    lnl__render_basic__tlb_miss__read
#define lnl__vector_engine_profile__gpu_memory_request_queue_full__read \
    lnl__render_basic__gpu_memory_request_queue_full__read
#define lnl__vector_engine_stalls__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__vector_engine_stalls__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__vector_engine_stalls__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__vector_engine_stalls__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define lnl__vector_engine_stalls__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define lnl__vector_engine_stalls__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define lnl__vector_engine_stalls__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define lnl__vector_engine_stalls__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define lnl__vector_engine_stalls__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
double
lnl__vector_engine_stalls__xve_stall_aluwr__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
double
lnl__vector_engine_stalls__xve_stall_barrier__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
#define lnl__vector_engine_stalls__xve_stall_control__read \
    lnl__compute_basic__xve_active__read
#define lnl__vector_engine_stalls__xve_stall_instfetch__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
#define lnl__vector_engine_stalls__xve_stall_other__read \
    lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read
double
lnl__vector_engine_stalls__xve_stall_pipestall__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
#define lnl__vector_engine_stalls__xve_stall_ps_dependency__read \
    lnl__compute_basic__xve_shared_function_access_hold__read
#define lnl__vector_engine_stalls__xve_stall_sbid__read \
    lnl__compute_basic__xve_stall__read
#define lnl__vector_engine_stalls__xve_stall_sendwr__read \
    lnl__render_basic__xve_active__read
#define lnl__vector_engine_stalls__thread_dispatch_queue0_active__read \
    lnl__render_pipe_profile__thread_dispatch_queue0_active__read
#define lnl__vector_engine_stalls__thread_dispatch_queue0_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue0_stall__read
#define lnl__vector_engine_stalls__thread_dispatch_queue1_active__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_active__read
#define lnl__vector_engine_stalls__thread_dispatch_queue1_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_stall__read
#define lnl__vector_engine_stalls__threadgroup_dispatch_queue0_resource_stall__read \
    lnl__render_pipe_profile__threadgroup_dispatch_queue0_resource_stall__read
#define lnl__vector_engine_stalls__threadgroup_dispatch_queue1_resource_stall__read \
    lnl__render_pipe_profile__threadgroup_dispatch_queue1_resource_stall__read
double
lnl__vector_engine_stalls__xve_active__read(const struct intel_xe_perf *perf,
                                            const struct intel_xe_perf_metric_set *metric_set,
                                            uint64_t *accumulator);
double
lnl__vector_engine_stalls__xve_shared_function_access_hold__read(const struct intel_xe_perf *perf,
                                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                                 uint64_t *accumulator);
double
lnl__vector_engine_stalls__xve_stall__read(const struct intel_xe_perf *perf,
                                           const struct intel_xe_perf_metric_set *metric_set,
                                           uint64_t *accumulator);
double
lnl__vector_engine_stalls__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                           const struct intel_xe_perf_metric_set *metric_set,
                                                           uint64_t *accumulator);
double
lnl__vector_engine_stalls__xve_multiple_pipe_active__read(const struct intel_xe_perf *perf,
                                                          const struct intel_xe_perf_metric_set *metric_set,
                                                          uint64_t *accumulator);
double
lnl__vector_engine_stalls__xve_pipe_alu0_and_alu1_active__read(const struct intel_xe_perf *perf,
                                                               const struct intel_xe_perf_metric_set *metric_set,
                                                               uint64_t *accumulator);
double
lnl__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read(const struct intel_xe_perf *perf,
                                                               const struct intel_xe_perf_metric_set *metric_set,
                                                               uint64_t *accumulator);
#define lnl__xve_pipeline_rasterization_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__xve_pipeline_rasterization_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__xve_pipeline_rasterization_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__xve_pipeline_rasterization_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

double
lnl__xve_pipeline_rasterization_profile__xve_active__read(const struct intel_xe_perf *perf,
                                                          const struct intel_xe_perf_metric_set *metric_set,
                                                          uint64_t *accumulator);
double
lnl__xve_pipeline_rasterization_profile__xve_stall__read(const struct intel_xe_perf *perf,
                                                         const struct intel_xe_perf_metric_set *metric_set,
                                                         uint64_t *accumulator);
#define lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_all_utilization__read \
    lnl__vector_engine_stalls__xve_stall_aluwr__read
#define lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_all_utilization__read \
    lnl__vector_engine_stalls__xve_stall_barrier__read
#define lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu2_all_utilization__read \
    lnl__compute_basic__xve_active__read
#define lnl__xve_pipeline_rasterization_profile__xve_pipe_alu0_and_alu1_active__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
#define lnl__xve_pipeline_rasterization_profile__xve_pipe_alu0_and_alu2_active__read \
    lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read
#define lnl__xve_pipeline_rasterization_profile__xve_multiple_pipe_active__read \
    lnl__vector_engine_stalls__xve_stall_pipestall__read
#define lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_vs_utilization__read \
    lnl__vector_engine_stalls__xve_shared_function_access_hold__read
#define lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ms_utilization__read \
    lnl__vector_engine_stalls__xve_stall__read
double
lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ts_utilization__read(const struct intel_xe_perf *perf,
                                                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                                                     uint64_t *accumulator);
#define lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ps_utilization__read \
    lnl__vector_engine_stalls__xve_multiple_pipe_active__read
#define lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_async_cs_utilization__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu1_active__read
#define lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_cs_utilization__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read
#define lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_vs_utilization__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu1_active__read
#define lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ms_utilization__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu2_active__read
double
lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ts_utilization__read(const struct intel_xe_perf *perf,
                                                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                                                     uint64_t *accumulator);
double
lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ps_utilization__read(const struct intel_xe_perf *perf,
                                                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                                                     uint64_t *accumulator);
#define lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_async_cs_utilization__read \
    lnl__vector_engine_profile__xve_multiple_pipe_active__read
#define lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_cs_utilization__read \
    lnl__vector_engine_profile__xve_pipe_alu0_and_alu1_active__read
double
lnl__xve_pipeline_rasterization_profile__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                                         const struct intel_xe_perf_metric_set *metric_set,
                                                                         uint64_t *accumulator);
#define lnl__xve_pipeline_rasterization_profile__xve_stall_aluwr__read \
    lnl__compute_basic__xve_shared_function_access_hold__read
#define lnl__xve_pipeline_rasterization_profile__xve_stall_barrier__read \
    lnl__compute_basic__xve_stall__read
#define lnl__xve_pipeline_rasterization_profile__xve_stall_control__read \
    lnl__render_basic__xve_active__read
#define lnl__xve_pipeline_rasterization_profile__xve_stall_instfetch__read \
    lnl__render_basic__xve_inst_executed_alu0_all_utilization__read
#define lnl__xve_pipeline_rasterization_profile__xve_stall_other__read \
    lnl__render_basic__xve_inst_executed_alu1_all_utilization__read
#define lnl__xve_pipeline_rasterization_profile__xve_stall_pipestall__read \
    lnl__render_basic__xve_shared_function_access_hold__read
double
lnl__xve_pipeline_rasterization_profile__xve_stall_ps_dependency__read(const struct intel_xe_perf *perf,
                                                                       const struct intel_xe_perf_metric_set *metric_set,
                                                                       uint64_t *accumulator);
double
lnl__xve_pipeline_rasterization_profile__xve_stall_sbid__read(const struct intel_xe_perf *perf,
                                                              const struct intel_xe_perf_metric_set *metric_set,
                                                              uint64_t *accumulator);
double
lnl__xve_pipeline_rasterization_profile__xve_stall_sendwr__read(const struct intel_xe_perf *perf,
                                                                const struct intel_xe_perf_metric_set *metric_set,
                                                                uint64_t *accumulator);
#define lnl__xve_pipeline_raytracing_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__xve_pipeline_raytracing_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__xve_pipeline_raytracing_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__xve_pipeline_raytracing_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define lnl__xve_pipeline_raytracing_profile__xve_active__read \
    lnl__xve_pipeline_rasterization_profile__xve_active__read
#define lnl__xve_pipeline_raytracing_profile__xve_stall__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_all_utilization__read \
    lnl__vector_engine_stalls__xve_stall_aluwr__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_all_utilization__read \
    lnl__vector_engine_stalls__xve_stall_barrier__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu2_all_utilization__read \
    lnl__compute_basic__xve_active__read
#define lnl__xve_pipeline_raytracing_profile__xve_pipe_alu0_and_alu1_active__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
#define lnl__xve_pipeline_raytracing_profile__xve_pipe_alu0_and_alu2_active__read \
    lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read
#define lnl__xve_pipeline_raytracing_profile__xve_multiple_pipe_active__read \
    lnl__vector_engine_stalls__xve_stall_pipestall__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_rt_ahs_utilization__read \
    lnl__vector_engine_stalls__xve_shared_function_access_hold__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_rt_chs_utilization__read \
    lnl__vector_engine_stalls__xve_stall__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_rt_ms_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ts_utilization__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_ps_utilization__read \
    lnl__vector_engine_stalls__xve_multiple_pipe_active__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_async_cs_utilization__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu1_active__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_cs_utilization__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_rt_ahs_utilization__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu1_active__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_rt_chs_utilization__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu2_active__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_rt_ms_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ts_utilization__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_ps_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ps_utilization__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_async_cs_utilization__read \
    lnl__vector_engine_profile__xve_multiple_pipe_active__read
#define lnl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_cs_utilization__read \
    lnl__vector_engine_profile__xve_pipe_alu0_and_alu1_active__read
#define lnl__xve_pipeline_raytracing_profile__xve_threads_occupancy_all__read \
    lnl__xve_pipeline_rasterization_profile__xve_threads_occupancy_all__read
#define lnl__xve_pipeline_raytracing_profile__xve_stall_aluwr__read \
    lnl__compute_basic__xve_shared_function_access_hold__read
#define lnl__xve_pipeline_raytracing_profile__xve_stall_barrier__read \
    lnl__compute_basic__xve_stall__read
#define lnl__xve_pipeline_raytracing_profile__xve_stall_control__read \
    lnl__render_basic__xve_active__read
#define lnl__xve_pipeline_raytracing_profile__xve_stall_instfetch__read \
    lnl__render_basic__xve_inst_executed_alu0_all_utilization__read
#define lnl__xve_pipeline_raytracing_profile__xve_stall_other__read \
    lnl__render_basic__xve_inst_executed_alu1_all_utilization__read
#define lnl__xve_pipeline_raytracing_profile__xve_stall_pipestall__read \
    lnl__render_basic__xve_shared_function_access_hold__read
#define lnl__xve_pipeline_raytracing_profile__xve_stall_ps_dependency__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_ps_dependency__read
#define lnl__xve_pipeline_raytracing_profile__xve_stall_sbid__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_sbid__read
#define lnl__xve_pipeline_raytracing_profile__xve_stall_sendwr__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_sendwr__read
#define lnl__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define lnl__test_oa__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define lnl__test_oa__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define lnl__test_oa__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define lnl__test_oa__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define lnl__test_oa__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define lnl__test_oa__test_event1__read \
    lnl__render_pipe_profile__ps_output_available__read
#define lnl__test_oa__test_event1_cycles__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define lnl__test_oa__test_event1_cycles_xecore0__read \
    lnl__render_basic__shader_pix_kill__read
#define lnl__test_oa__test_event1_cycles_xecore1__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define lnl__test_oa__test_event1_cycles_xecore2__read \
    lnl__render_basic__sampler_2_x2_read__read
#define lnl__test_oa__test_event1_cycles_xecore3__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define lnl__test_oa__test_event1_cycles_xecore4__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define lnl__test_oa__test_event1_cycles_xecore5__read \
    lnl__render_basic__icache_hit__read
#define lnl__test_oa__test_event1_cycles_xecore6__read \
    lnl__render_basic__icache_miss__read
#define lnl__test_oa__test_event1_cycles_xecore7__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
uint64_t
lnl__test_oa__test_event1_cycles_average__read(const struct intel_xe_perf *perf,
                                               const struct intel_xe_perf_metric_set *metric_set,
                                               uint64_t *accumulator);
double
lnl__test_oa__test_event2__read(const struct intel_xe_perf *perf,
                                const struct intel_xe_perf_metric_set *metric_set,
                                uint64_t *accumulator);
#define lnl__test_oa__test_event2_cycles__read \
    lnl__render_basic__pixel_blend__read
#define lnl__media_set1__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__media_set1__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__media_set1__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__media_set1__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

uint64_t
lnl__media_set1__media_read_request__read(const struct intel_xe_perf *perf,
                                          const struct intel_xe_perf_metric_set *metric_set,
                                          uint64_t *accumulator);
#define lnl__media_set1__media_write_request__read \
    tglgt1__render_basic__vs_threads__read
double
lnl__media_set1__command_parser_video_decode_engine0_busy__read(const struct intel_xe_perf *perf,
                                                                const struct intel_xe_perf_metric_set *metric_set,
                                                                uint64_t *accumulator);
#define lnl__media_set1__video_decode_box0_read_request__read \
    tglgt1__render_basic__ds_threads__read
#define lnl__media_set1__video_decode_box0_write_request__read \
    tglgt1__render_basic__cs_threads__read
double
lnl__media_set1__command_parser_video_decode_engine1_busy__read(const struct intel_xe_perf *perf,
                                                                const struct intel_xe_perf_metric_set *metric_set,
                                                                uint64_t *accumulator);
#define lnl__media_set1__video_decode_box1_read_request__read \
    tglgt1__render_basic__ps_threads__read
uint64_t
lnl__media_set1__video_decode_box1_write_request__read(const struct intel_xe_perf *perf,
                                                       const struct intel_xe_perf_metric_set *metric_set,
                                                       uint64_t *accumulator);
#define lnl__media_set2__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define lnl__media_set2__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define lnl__media_set2__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define lnl__media_set2__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define lnl__media_set2__command_parser_video_enhancement_engine0_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define lnl__media_set2__video_enhancement_box0_read_request__read \
    tglgt1__render_basic__vs_threads__read
#define lnl__media_set2__video_enhancement_box0_write_request__read \
    tglgt1__render_basic__hs_threads__read
double
lnl__media_set2__command_parser_video_enhancement_engine1_busy__read(const struct intel_xe_perf *perf,
                                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                                     uint64_t *accumulator);
#define lnl__media_set2__video_enhancement_box1_read_request__read \
    tglgt1__render_basic__cs_threads__read
#define lnl__media_set2__video_enhancement_box1_write_request__read \
    tglgt1__render_basic__gs_threads__read
#define bmg__render_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__render_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__render_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__render_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__render_basic__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define bmg__render_basic__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define bmg__render_basic__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define bmg__render_basic__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define bmg__render_basic__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define bmg__render_basic__pixel_blend__read \
    lnl__render_basic__pixel_blend__read
#define bmg__render_basic__pixel_write__read \
    lnl__render_basic__pixel_write__read
#define bmg__render_basic__postps_alpha_test_fail__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define bmg__render_basic__shader_pix_kill__read \
    lnl__render_basic__shader_pix_kill__read
#define bmg__render_basic__l3_read__read \
    lnl__render_basic__l3_read__read
#define bmg__render_basic__l3_write__read \
    lnl__render_basic__l3_write__read
#define bmg__render_basic__command_parser_compute_engine_busy__read \
    lnl__render_basic__command_parser_compute_engine_busy__read
#define bmg__render_basic__command_parser_render_engine_busy__read \
    lnl__render_basic__command_parser_render_engine_busy__read
#define bmg__render_basic__command_parser_copy_engine_busy__read \
    lnl__render_basic__command_parser_copy_engine_busy__read
#define bmg__render_basic__clipper_input_vertex__read \
    lnl__render_basic__clipper_input_vertex__read
#define bmg__render_basic__clipper_primitive_cull__read \
    lnl__render_basic__clipper_primitive_cull__read
#define bmg__render_basic__clipper_primitive_far_near_clip__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
#define bmg__render_basic__clipper_primitive_output__read \
    lnl__render_basic__clipper_primitive_output__read
#define bmg__render_basic__ia_primitive__read \
    lnl__render_basic__ia_primitive__read
#define bmg__render_basic__streamout_output_vertex_count__read \
    lnl__render_basic__streamout_output_vertex_count__read
#define bmg__render_basic__stripsfan_object_count__read \
    lnl__render_basic__stripsfan_object_count__read
#define bmg__render_basic__stripsfan_object_cull__read \
    lnl__render_basic__stripsfan_object_cull__read
#define bmg__render_basic__streamout_primitive_write_count__read \
    lnl__render_basic__streamout_primitive_write_count__read
#define bmg__render_basic__slm_bank_conflict_count__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define bmg__render_basic__compressor_input__read \
    lnl__render_basic__compressor_input__read
#define bmg__render_basic__compressor_output__read \
    lnl__render_basic__compressor_output__read
#define bmg__render_basic__tlb_miss__read \
    lnl__render_basic__tlb_miss__read
#define bmg__render_basic__gpu_memory_request_queue_full__read \
    lnl__render_basic__gpu_memory_request_queue_full__read
#define bmg__render_basic__sampler_2_x2_read__read \
    lnl__render_basic__sampler_2_x2_read__read
#define bmg__render_basic__sampler_texture_cache_access__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define bmg__render_basic__sampler_texture_cache_miss__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define bmg__render_basic__urb_read__read \
    lnl__render_basic__urb_read__read
#define bmg__render_basic__urb_write__read \
    lnl__render_basic__urb_write__read
#define bmg__render_basic__icache_hit__read \
    lnl__render_basic__icache_hit__read
#define bmg__render_basic__icache_miss__read \
    lnl__render_basic__icache_miss__read
#define bmg__render_basic__xve_active__read \
    lnl__render_basic__xve_active__read
#define bmg__render_basic__xve_inst_executed_alu0_all__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define bmg__render_basic__xve_inst_executed_alu1_all__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define bmg__render_basic__xve_inst_executed_send_all__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define bmg__render_basic__xve_inst_executed_alu0_cs__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define bmg__render_basic__xve_inst_executed_alu0_ps__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define bmg__render_basic__xve_inst_executed_alu0_vs__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define bmg__render_basic__xve_inst_executed_alu1_cs__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define bmg__render_basic__xve_inst_executed_alu1_ps__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define bmg__render_basic__xve_inst_executed_alu1_vs__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
#define bmg__render_basic__xve_shared_function_access_hold__read \
    lnl__render_basic__xve_shared_function_access_hold__read
#define bmg__render_basic__rt_bvh_cache_miss__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define bmg__render_basic__rt_input_message_ray_count__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define bmg__render_basic__load_store_cache_hit__read \
    lnl__render_basic__load_store_cache_hit__read
#define bmg__render_basic__load_store_cache_access__read \
    lnl__render_basic__load_store_cache_access__read
#define bmg__render_basic__xve_threads_occupancy_all__read \
    lnl__render_basic__xve_threads_occupancy_all__read
#define bmg__render_basic__xve_inst_issued_all__read \
    lnl__render_basic__xve_inst_issued_all__read
#define bmg__render_basic__gpu_memory_byte_read__read \
    lnl__render_basic__gpu_memory_byte_read__read
#define bmg__render_basic__gpu_memory_byte_write__read \
    lnl__render_basic__gpu_memory_byte_write__read
#define bmg__render_basic__load_store_cache_byte_read__read \
    lnl__render_basic__load_store_cache_byte_read__read
#define bmg__render_basic__load_store_cache_byte_write__read \
    lnl__render_basic__load_store_cache_byte_write__read
#define bmg__render_basic__slm_byte_read__read \
    lnl__render_basic__slm_byte_read__read
#define bmg__render_basic__slm_byte_write__read \
    lnl__render_basic__slm_byte_write__read
#define bmg__render_basic__gpu_memory_byte_read_rate__read \
    lnl__render_basic__gpu_memory_byte_read_rate__read
#define bmg__render_basic__gpu_memory_byte_write_rate__read \
    lnl__render_basic__gpu_memory_byte_write_rate__read
#define bmg__render_basic__xve_stall__read \
    lnl__render_basic__xve_stall__read
#define bmg__render_basic__xve_inst_executed_alu0_all_utilization__read \
    lnl__render_basic__xve_inst_executed_alu0_all_utilization__read
#define bmg__render_basic__xve_inst_executed_alu1_all_utilization__read \
    lnl__render_basic__xve_inst_executed_alu1_all_utilization__read
#define bmg__render_basic__host_to_gpumem_transaction_read__read \
    lnl__device_cache_profile__l3_write__read
#define bmg__render_basic__host_to_gpumem_transaction_write__read \
    lnl__device_cache_profile__gpu_memory_l3_read__read
#define bmg__render_basic__sysmem_transaction_read__read \
    lnl__device_cache_profile__gpu_memory_l3_write__read
#define bmg__render_basic__sysmem_transaction_write__read \
    lnl__device_cache_profile__gpu_memory_read__read
#define bmg__compute_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__compute_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__compute_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__compute_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__compute_basic__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define bmg__compute_basic__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define bmg__compute_basic__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define bmg__compute_basic__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define bmg__compute_basic__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define bmg__compute_basic__icache_hit__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define bmg__compute_basic__icache_miss__read \
    lnl__render_basic__shader_pix_kill__read
#define bmg__compute_basic__xve_active__read \
    lnl__compute_basic__xve_active__read
#define bmg__compute_basic__xve_inst_executed_alu0_all__read \
    lnl__render_basic__sampler_2_x2_read__read
#define bmg__compute_basic__xve_inst_executed_alu1_all__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define bmg__compute_basic__xve_inst_executed_send_all__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define bmg__compute_basic__xve_inst_issued_all__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define bmg__compute_basic__xve_shared_function_access_hold__read \
    lnl__compute_basic__xve_shared_function_access_hold__read
#define bmg__compute_basic__xve_stall__read \
    lnl__compute_basic__xve_stall__read
#define bmg__compute_basic__xve_threads_occupancy_all__read \
    lnl__compute_basic__xve_threads_occupancy_all__read
#define bmg__compute_basic__xve_inst_executed_alu2_all__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define bmg__compute_basic__xve_multiple_pipe_active__read \
    lnl__render_basic__xve_inst_executed_alu0_all_utilization__read
#define bmg__compute_basic__load_store_cache_partial_write_count__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define bmg__compute_basic__slm_bank_conflict_count__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define bmg__compute_basic__slm_byte_read__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define bmg__compute_basic__slm_byte_write__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define bmg__compute_basic__load_store_cache_byte_read__read \
    lnl__render_basic__load_store_cache_hit__read
#define bmg__compute_basic__load_store_cache_byte_write__read \
    lnl__render_basic__load_store_cache_access__read
#define bmg__compute_basic__load_store_cache_access__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define bmg__compute_basic__load_store_cache_hit__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define bmg__compute_basic__l3_atomic_access__read \
    lnl__render_basic__pixel_blend__read
#define bmg__compute_basic__l3_hit__read \
    lnl__render_basic__pixel_write__read
#define bmg__compute_basic__l3_miss__read \
    lnl__render_basic__l3_read__read
#define bmg__compute_basic__l3_read__read \
    lnl__render_basic__l3_write__read
#define bmg__compute_basic__l3_write__read \
    lnl__compute_basic__l3_write__read
#define bmg__compute_basic__l3_stall__read \
    lnl__compute_basic__l3_stall__read
#define bmg__compute_basic__compressor_input__read \
    lnl__compute_basic__compressor_input__read
#define bmg__compute_basic__compressor_output__read \
    lnl__render_basic__clipper_input_vertex__read
#define bmg__compute_basic__gpu_memory_byte_read__read \
    lnl__compute_basic__gpu_memory_byte_read__read
#define bmg__compute_basic__gpu_memory_byte_write__read \
    lnl__compute_basic__gpu_memory_byte_write__read
#define bmg__compute_basic__gpu_memory_byte_read_rate__read \
    lnl__compute_basic__gpu_memory_byte_read_rate__read
#define bmg__compute_basic__gpu_memory_byte_write_rate__read \
    lnl__compute_basic__gpu_memory_byte_write_rate__read
#define bmg__compute_basic__gpu_memory_l3_read__read \
    lnl__render_basic__clipper_primitive_output__read
#define bmg__compute_basic__gpu_memory_l3_write__read \
    lnl__render_basic__ia_primitive__read
#define bmg__compute_basic__gpu_memory_request_queue_full__read \
    lnl__compute_basic__gpu_memory_request_queue_full__read
#define bmg__compute_basic__tlb_miss__read \
    lnl__render_basic__stripsfan_object_count__read
#define bmg__compute_basic__async_gpgpu_thread_exit_count__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define bmg__compute_basic__gpgpu_dispatch__read \
    lnl__compute_basic__gpgpu_dispatch__read
#define bmg__compute_basic__command_parser_compute_engine_busy__read \
    lnl__compute_basic__command_parser_compute_engine_busy__read
#define bmg__compute_basic__command_parser_compute_engine_dispatch_kernel_count__read \
    lnl__render_basic__streamout_primitive_write_count__read
#define bmg__compute_basic__command_parser_copy_engine_busy__read \
    lnl__compute_basic__command_parser_copy_engine_busy__read
#define bmg__compute_basic__command_parser_flush_count__read \
    lnl__render_basic__compressor_output__read
#define bmg__compute_basic__command_parser_render_engine_busy__read \
    lnl__compute_basic__command_parser_render_engine_busy__read
#define bmg__compute_basic__command_parser_render_engine_dispatch_kernel_count__read \
    lnl__compute_basic__command_parser_render_engine_dispatch_kernel_count__read
#define bmg__compute_basic__xve_pipe_alu0_and_alu1_active__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu1_active__read
#define bmg__compute_basic__xve_pipe_alu0_and_alu2_active__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu2_active__read
#define bmg__compute_basic__xve_inst_executed_alu0_all_utilization__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
#define bmg__compute_basic__xve_inst_executed_alu1_all_utilization__read \
    lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read
#define bmg__compute_basic__xve_inst_executed_alu2_all_utilization__read \
    lnl__render_basic__xve_active__read
#define bmg__compute_basic__host_to_gpumem_transaction_read__read \
    lnl__render_basic__urb_read__read
#define bmg__compute_basic__host_to_gpumem_transaction_write__read \
    lnl__render_basic__urb_write__read
#define bmg__compute_basic__sysmem_transaction_read__read \
    lnl__device_cache_profile__l3_read__read
uint64_t
bmg__compute_basic__sysmem_transaction_write__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
#define bmg__depth_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__depth_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__depth_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__depth_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__depth_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define bmg__depth_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define bmg__depth_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define bmg__depth_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define bmg__depth_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define bmg__depth_profile__early_depth_stencil_test_fail_np__read \
    lnl__render_basic__pixel_blend__read
#define bmg__depth_profile__early_depth_stencil_test_fail_p__read \
    lnl__render_basic__pixel_write__read
#define bmg__depth_profile__hiz_depth_test_ambig_np__read \
    lnl__render_basic__l3_read__read
#define bmg__depth_profile__hiz_depth_test_ambig_p__read \
    lnl__render_basic__l3_write__read
#define bmg__depth_profile__hiz_depth_test_fail_np__read \
    lnl__compute_basic__l3_write__read
#define bmg__depth_profile__hiz_depth_test_fail_p__read \
    lnl__depth_profile__hiz_depth_test_fail_p__read
#define bmg__depth_profile__hiz_depth_test_pass_p__read \
    lnl__compute_basic__compressor_input__read
#define bmg__depth_profile__hiz_subspan_latency_fifofull__read \
    lnl__depth_profile__hiz_subspan_latency_fifofull__read
#define bmg__depth_profile__iz_output_ready__read \
    lnl__depth_profile__iz_output_ready__read
#define bmg__depth_profile__iz_subspan_latency_fifofull__read \
    lnl__depth_profile__iz_subspan_latency_fifofull__read
#define bmg__depth_profile__postps_depth_stencil_test_fail__read \
    lnl__render_basic__clipper_primitive_output__read
#define bmg__depth_profile__render_cache_alloc__read \
    lnl__render_basic__ia_primitive__read
#define bmg__depth_profile__render_cache_hit__read \
    lnl__render_basic__streamout_output_vertex_count__read
#define bmg__depth_profile__render_cache_read__read \
    lnl__render_basic__stripsfan_object_count__read
#define bmg__depth_profile__render_cache_write__read \
    lnl__render_basic__stripsfan_object_cull__read
#define bmg__depth_profile__urb_cross_slice_read__read \
    lnl__render_basic__streamout_primitive_write_count__read
#define bmg__depth_profile__pixel_2_x2_lit_post_rasterizer_early_depth__read \
    lnl__render_basic__compressor_input__read
#define bmg__depth_profile__pixel_2_x2_lit_post_rasterizer_late_depth__read \
    lnl__render_basic__compressor_output__read
#define bmg__depth_profile__gpu_memory_active__read \
    lnl__depth_profile__gpu_memory_active__read
#define bmg__device_cache_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__device_cache_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__device_cache_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__device_cache_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__device_cache_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define bmg__device_cache_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define bmg__device_cache_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define bmg__device_cache_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define bmg__device_cache_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define bmg__device_cache_profile__amfs_l3_access__read \
    lnl__render_basic__pixel_blend__read
#define bmg__device_cache_profile__amfs_l3_atomic__read \
    lnl__render_basic__pixel_write__read
#define bmg__device_cache_profile__amfs_l3_hit__read \
    lnl__render_basic__l3_read__read
#define bmg__device_cache_profile__amfs_l3_write__read \
    lnl__render_basic__l3_write__read
#define bmg__device_cache_profile__color_l3_access__read \
    lnl__compute_basic__l3_write__read
#define bmg__device_cache_profile__color_l3_hit__read \
    lnl__depth_profile__hiz_depth_test_fail_p__read
#define bmg__device_cache_profile__icache_l3_hit__read \
    lnl__compute_basic__compressor_input__read
#define bmg__device_cache_profile__icache_l3_read__read \
    lnl__render_basic__clipper_input_vertex__read
#define bmg__device_cache_profile__load_store_cache_l3_hit__read \
    lnl__render_basic__clipper_primitive_cull__read
#define bmg__device_cache_profile__load_store_cache_l3_read__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
#define bmg__device_cache_profile__load_store_cache_l3_write__read \
    lnl__render_basic__clipper_primitive_output__read
#define bmg__device_cache_profile__sampler_l3_hit__read \
    lnl__render_basic__ia_primitive__read
#define bmg__device_cache_profile__sampler_l3_read__read \
    lnl__render_basic__streamout_output_vertex_count__read
#define bmg__device_cache_profile__z_l3_access__read \
    lnl__render_basic__stripsfan_object_count__read
#define bmg__device_cache_profile__z_l3_hit__read \
    lnl__render_basic__stripsfan_object_cull__read
#define bmg__device_cache_profile__l3_busy__read \
    lnl__device_cache_profile__l3_busy__read
#define bmg__device_cache_profile__l3_input_available__read \
    lnl__device_cache_profile__l3_input_available__read
#define bmg__device_cache_profile__l3_output_ready__read \
    lnl__device_cache_profile__l3_output_ready__read
#define bmg__device_cache_profile__l3_superq_full__read \
    lnl__device_cache_profile__l3_superq_full__read
#define bmg__device_cache_profile__l3_atomic_access__read \
    lnl__compute_basic__command_parser_render_engine_dispatch_kernel_count__read
#define bmg__device_cache_profile__l3_hit__read \
    lnl__render_basic__urb_read__read
#define bmg__device_cache_profile__l3_miss__read \
    lnl__render_basic__urb_write__read
#define bmg__device_cache_profile__l3_read__read \
    lnl__device_cache_profile__l3_read__read
#define bmg__device_cache_profile__l3_stall__read \
    lnl__device_cache_profile__l3_stall__read
#define bmg__device_cache_profile__l3_write__read \
    lnl__device_cache_profile__l3_write__read
#define bmg__device_cache_profile__gpu_memory_l3_read__read \
    lnl__device_cache_profile__gpu_memory_l3_read__read
#define bmg__device_cache_profile__gpu_memory_l3_write__read \
    lnl__device_cache_profile__gpu_memory_l3_write__read
#define bmg__device_cache_profile__gpu_memory_read__read \
    lnl__device_cache_profile__gpu_memory_read__read
#define bmg__device_cache_profile__gpu_memory_write__read \
    lnl__device_cache_profile__gpu_memory_write__read
#define bmg__memory_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__memory_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__memory_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__memory_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__memory_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define bmg__memory_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define bmg__memory_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define bmg__memory_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define bmg__memory_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define bmg__memory_profile__compressor_input__read \
    lnl__render_basic__pixel_blend__read
#define bmg__memory_profile__compressor_output__read \
    lnl__render_basic__pixel_write__read
#define bmg__memory_profile__gpu_memory_32_b_transaction_read__read \
    lnl__render_basic__l3_read__read
#define bmg__memory_profile__gpu_memory_32_b_transaction_write__read \
    lnl__render_basic__l3_write__read
#define bmg__memory_profile__gpu_memory_64_b_transaction_read__read \
    lnl__compute_basic__l3_write__read
#define bmg__memory_profile__gpu_memory_64_b_transaction_write__read \
    lnl__depth_profile__hiz_depth_test_fail_p__read
#define bmg__memory_profile__gpu_memory_byte_read__read \
    lnl__memory_profile__gpu_memory_byte_read__read
#define bmg__memory_profile__gpu_memory_byte_write__read \
    lnl__memory_profile__gpu_memory_byte_write__read
#define bmg__memory_profile__gpu_memory_byte_read_rate__read \
    lnl__memory_profile__gpu_memory_byte_read_rate__read
#define bmg__memory_profile__gpu_memory_byte_write_rate__read \
    lnl__memory_profile__gpu_memory_byte_write_rate__read
#define bmg__memory_profile__gpu_memory_l3_read__read \
    lnl__render_basic__clipper_primitive_cull__read
#define bmg__memory_profile__gpu_memory_l3_write__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
#define bmg__memory_profile__gpu_memory_request_queue_full__read \
    lnl__memory_profile__gpu_memory_request_queue_full__read
#define bmg__memory_profile__tlb_miss__read \
    lnl__render_basic__ia_primitive__read
#define bmg__memory_profile__l3_atomic_access__read \
    lnl__render_basic__streamout_output_vertex_count__read
#define bmg__memory_profile__l3_busy__read \
    lnl__memory_profile__l3_busy__read
#define bmg__memory_profile__l3_hit__read \
    lnl__render_basic__stripsfan_object_cull__read
#define bmg__memory_profile__l3_input_available__read \
    lnl__device_cache_profile__l3_busy__read
#define bmg__memory_profile__l3_miss__read \
    lnl__render_basic__compressor_input__read
#define bmg__memory_profile__l3_output_ready__read \
    lnl__device_cache_profile__l3_output_ready__read
#define bmg__memory_profile__l3_read__read \
    lnl__render_basic__tlb_miss__read
#define bmg__memory_profile__l3_stall__read \
    lnl__memory_profile__l3_stall__read
#define bmg__memory_profile__l3_superq_full__read \
    lnl__memory_profile__l3_superq_full__read
#define bmg__memory_profile__l3_write__read \
    lnl__render_basic__urb_write__read
#define bmg__memory_profile__load_store_cache_access__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define bmg__memory_profile__load_store_cache_byte_read__read \
    lnl__render_basic__shader_pix_kill__read
#define bmg__memory_profile__load_store_cache_byte_write__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define bmg__memory_profile__load_store_cache_hit__read \
    lnl__render_basic__sampler_2_x2_read__read
#define bmg__memory_profile__load_store_cache_input_available__read \
    lnl__memory_profile__load_store_cache_input_available__read
#define bmg__memory_profile__load_store_cache_number_of_bank_access_count__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define bmg__memory_profile__load_store_cache_output_ready__read \
    lnl__memory_profile__load_store_cache_output_ready__read
#define bmg__memory_profile__load_store_cache_partial_write_count__read \
    lnl__render_basic__icache_miss__read
#define bmg__memory_profile__slm_access_count__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define bmg__memory_profile__slm_bank_conflict_count__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define bmg__memory_profile__slm_byte_read__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define bmg__memory_profile__slm_byte_write__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define bmg__memory_profile__xve_load_store_cache_atomic_message_count__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define bmg__memory_profile__xve_load_store_cache_fence_message_count__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define bmg__memory_profile__xve_load_store_cache_read_message_count__read \
    lnl__render_basic__load_store_cache_hit__read
#define bmg__memory_profile__xve_load_store_cache_register_request_count__read \
    lnl__render_basic__load_store_cache_access__read
#define bmg__memory_profile__xve_load_store_cache_register_response_count__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define bmg__memory_profile__xve_load_store_cache_write_message_count__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define bmg__memory_profile__xve_slm_atomic_message_count__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define bmg__memory_profile__xve_slm_fence_message_count__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define bmg__memory_profile__xve_slm_read_message_count__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define bmg__memory_profile__xve_slm_write_message_count__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define bmg__memory_profile__copy_engine_read_request__read \
    lnl__device_cache_profile__l3_read__read
#define bmg__memory_profile__copy_engine_request_stall__read \
    lnl__memory_profile__copy_engine_request_stall__read
#define bmg__memory_profile__copy_engine_write_request__read \
    lnl__device_cache_profile__l3_write__read
#define bmg__memory_profile__host_to_gpumem_transaction_read__read \
    lnl__device_cache_profile__gpu_memory_l3_read__read
#define bmg__memory_profile__host_to_gpumem_transaction_write__read \
    lnl__device_cache_profile__gpu_memory_l3_write__read
#define bmg__memory_profile__sysmem_transaction_read__read \
    lnl__device_cache_profile__gpu_memory_read__read
#define bmg__memory_profile__sysmem_transaction_write__read \
    lnl__device_cache_profile__gpu_memory_write__read
#define bmg__render_pipe_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__render_pipe_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__render_pipe_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__render_pipe_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__render_pipe_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define bmg__render_pipe_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define bmg__render_pipe_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define bmg__render_pipe_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define bmg__render_pipe_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define bmg__render_pipe_profile__clipper_input_available__read \
    lnl__render_pipe_profile__clipper_input_available__read
#define bmg__render_pipe_profile__clipper_output_ready__read \
    lnl__render_pipe_profile__clipper_output_ready__read
#define bmg__render_pipe_profile__clipper_transaction_output__read \
    lnl__render_basic__l3_read__read
#define bmg__render_pipe_profile__streamout_primitive_storage_need__read \
    lnl__render_basic__l3_write__read
#define bmg__render_pipe_profile__stripsfan_output_ready__read \
    lnl__render_pipe_profile__stripsfan_output_ready__read
#define bmg__render_pipe_profile__vertex_fetch_input_available__read \
    lnl__render_pipe_profile__vertex_fetch_input_available__read
#define bmg__render_pipe_profile__vertex_fetch_output_ready__read \
    lnl__render_pipe_profile__vertex_fetch_output_ready__read
#define bmg__render_pipe_profile__vs_output_ready__read \
    lnl__render_pipe_profile__vs_output_ready__read
#define bmg__render_pipe_profile__color_pipe_cache_latency1_stall__read \
    lnl__render_pipe_profile__color_pipe_cache_latency1_stall__read
#define bmg__render_pipe_profile__color_pipe_cache_latency2_stall__read \
    lnl__render_pipe_profile__color_pipe_cache_latency2_stall__read
#define bmg__render_pipe_profile__pixel_post_process_input_available__read \
    lnl__render_pipe_profile__pixel_post_process_input_available__read
#define bmg__render_pipe_profile__pixel_post_process_output_ready__read \
    lnl__render_pipe_profile__pixel_post_process_output_ready__read
#define bmg__render_pipe_profile__ps_output_available__read \
    lnl__render_pipe_profile__ps_output_available__read
#define bmg__render_pipe_profile__render_cache_input_available__read \
    lnl__render_pipe_profile__render_cache_input_available__read
#define bmg__render_pipe_profile__render_cache_output_ready__read \
    lnl__render_pipe_profile__render_cache_output_ready__read
#define bmg__render_pipe_profile__amfs_stall_all_input__read \
    lnl__render_pipe_profile__amfs_stall_all_input__read
#define bmg__render_pipe_profile__amfs_stall_any_input__read \
    lnl__render_pipe_profile__amfs_stall_any_input__read
#define bmg__render_pipe_profile__sampler_active__read \
    lnl__render_pipe_profile__sampler_active__read
#define bmg__render_pipe_profile__sampler_input_available__read \
    lnl__render_pipe_profile__sampler_input_available__read
#define bmg__render_pipe_profile__sampler_memory_latency_stall__read \
    lnl__render_pipe_profile__sampler_memory_latency_stall__read
#define bmg__render_pipe_profile__sampler_output_ready__read \
    lnl__memory_profile__load_store_cache_input_available__read
#define bmg__render_pipe_profile__rasterizer_input_available__read \
    lnl__render_pipe_profile__rasterizer_input_available__read
#define bmg__render_pipe_profile__rasterizer_output_ready__read \
    lnl__render_pipe_profile__rasterizer_output_ready__read
#define bmg__render_pipe_profile__rasterizer_transaction_output__read \
    lnl__render_basic__tlb_miss__read
#define bmg__render_pipe_profile__task_thread_exit_count__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define bmg__render_pipe_profile__task_threadgroup_count__read \
    lnl__render_basic__icache_hit__read
#define bmg__render_pipe_profile__thread_dispatch_input_available__read \
    lnl__render_pipe_profile__thread_dispatch_input_available__read
#define bmg__render_pipe_profile__thread_dispatch_ps_active__read \
    lnl__render_pipe_profile__thread_dispatch_ps_active__read
#define bmg__render_pipe_profile__thread_dispatch_queue0_active__read \
    lnl__render_pipe_profile__thread_dispatch_queue0_active__read
#define bmg__render_pipe_profile__thread_dispatch_queue0_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue0_stall__read
#define bmg__render_pipe_profile__thread_dispatch_queue1_active__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_active__read
#define bmg__render_pipe_profile__thread_dispatch_queue1_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_stall__read
#define bmg__render_pipe_profile__threadgroup_dispatch_queue0_resource_stall__read \
    lnl__render_pipe_profile__threadgroup_dispatch_queue0_resource_stall__read
#define bmg__render_pipe_profile__threadgroup_dispatch_queue1_resource_stall__read \
    lnl__render_pipe_profile__threadgroup_dispatch_queue1_resource_stall__read
#define bmg__render_pipe_profile__command_parser_render_engine_draw_count__read \
    lnl__compute_basic__command_parser_render_engine_dispatch_kernel_count__read
#define bmg__render_pipe_profile__amfs_4_x4_shading_request__read \
    lnl__render_basic__urb_read__read
#define bmg__render_pipe_profile__amfs_cache_hit__read \
    lnl__render_basic__urb_write__read
#define bmg__render_pipe_profile__amfs_cache_miss__read \
    lnl__device_cache_profile__l3_read__read
#define bmg__rt_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__rt_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__rt_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__rt_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__rt_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define bmg__rt_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define bmg__rt_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define bmg__rt_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define bmg__rt_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define bmg__rt_profile__rt_any_hit_thread_ray_dispatch__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define bmg__rt_profile__rt_callable_thread_ray_dispatch__read \
    lnl__render_basic__shader_pix_kill__read
#define bmg__rt_profile__rt_closest_hit_thread_ray_dispatch__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define bmg__rt_profile__rt_input_message_spawn_count__read \
    lnl__render_basic__sampler_2_x2_read__read
#define bmg__rt_profile__rt_instance_node_ray_count__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define bmg__rt_profile__rt_internal_node_ray_count__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define bmg__rt_profile__rt_intersection_thread_ray_dispatch__read \
    lnl__render_basic__icache_hit__read
#define bmg__rt_profile__rt_message_stall__read \
    lnl__render_pipe_profile__thread_dispatch_input_available__read
#define bmg__rt_profile__rt_miss_thread_ray_dispatch__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define bmg__rt_profile__rt_procedural_node_ray_count__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define bmg__rt_profile__rt_quad_leaf_ray_count__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define bmg__rt_profile__rt_quad_test_ray_count__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define bmg__rt_profile__rt_request_collision__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_stall__read
#define bmg__rt_profile__rt_transform_ray_count__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define bmg__rt_profile__rt_traversal_input_ray_count__read \
    lnl__render_basic__load_store_cache_hit__read
#define bmg__rt_profile__rt_traversal_output_ray_count__read \
    lnl__render_basic__load_store_cache_access__read
#define bmg__rt_profile__rt_traversal_stall__read \
    lnl__rt_profile__rt_traversal_stall__read
#define bmg__rt_profile__rt_traversal_step_ray_count__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define bmg__rt_profile__xve_inst_executed_alu0_rt_ahs__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define bmg__rt_profile__xve_inst_executed_alu0_rt_chs__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define bmg__rt_profile__xve_inst_executed_alu0_rt_ms__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define bmg__rt_profile__xve_inst_executed_alu1_rt_ahs__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define bmg__rt_profile__xve_inst_executed_alu1_rt_chs__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
#define bmg__rt_profile__xve_inst_executed_alu1_rt_ms__read \
    lnl__rt_profile__xve_inst_executed_alu1_rt_ms__read
#define bmg__rt_profile__xve_threads_occupancy_all__read \
    lnl__rt_profile__xve_threads_occupancy_all__read
#define bmg__rt_profile__rt_bvh_cache_miss__read \
    lnl__render_basic__load_store_cache_byte_read__read
#define bmg__rt_profile__rt_input_message_ray_count__read \
    lnl__render_basic__load_store_cache_byte_write__read
#define bmg__rt_profile__rt_load_store_cache_read_message_count__read \
    lnl__render_basic__slm_byte_read__read
#define bmg__rt_profile__rt_load_store_cache_write_from_message_count__read \
    lnl__render_basic__slm_byte_write__read
#define bmg__vector_engine_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__vector_engine_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__vector_engine_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__vector_engine_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__vector_engine_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define bmg__vector_engine_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define bmg__vector_engine_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define bmg__vector_engine_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define bmg__vector_engine_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define bmg__vector_engine_profile__icache_hit__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define bmg__vector_engine_profile__icache_miss__read \
    lnl__render_basic__shader_pix_kill__read
#define bmg__vector_engine_profile__xve_active__read \
    lnl__compute_basic__xve_active__read
#define bmg__vector_engine_profile__xve_inst_executed_alu0_all__read \
    lnl__render_basic__sampler_2_x2_read__read
#define bmg__vector_engine_profile__xve_inst_executed_alu1_all__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define bmg__vector_engine_profile__xve_inst_executed_alu2_all__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define bmg__vector_engine_profile__xve_inst_executed_barrier__read \
    lnl__render_basic__icache_hit__read
#define bmg__vector_engine_profile__xve_inst_executed_bitconv__read \
    lnl__render_basic__icache_miss__read
#define bmg__vector_engine_profile__xve_inst_executed_control_all__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define bmg__vector_engine_profile__xve_inst_executed_fp16__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define bmg__vector_engine_profile__xve_inst_executed_fp32__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define bmg__vector_engine_profile__xve_inst_executed_fp64__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define bmg__vector_engine_profile__xve_inst_executed_fp64_2_nd__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define bmg__vector_engine_profile__xve_inst_executed_int16__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define bmg__vector_engine_profile__xve_inst_executed_int32__read \
    lnl__render_basic__load_store_cache_hit__read
#define bmg__vector_engine_profile__xve_inst_executed_int64__read \
    lnl__render_basic__load_store_cache_access__read
#define bmg__vector_engine_profile__xve_inst_executed_math__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define bmg__vector_engine_profile__xve_inst_executed_nondivergent__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define bmg__vector_engine_profile__xve_inst_executed_predication__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define bmg__vector_engine_profile__xve_inst_executed_send_all__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define bmg__vector_engine_profile__xve_inst_executed_xmx_bf16__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define bmg__vector_engine_profile__xve_inst_executed_xmx_fp16__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define bmg__vector_engine_profile__xve_inst_executed_xmx_int2__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
#define bmg__vector_engine_profile__xve_inst_executed_xmx_int4__read \
    lnl__rt_profile__xve_inst_executed_alu1_rt_ms__read
#define bmg__vector_engine_profile__xve_inst_executed_xmx_int8__read \
    lnl__render_basic__xve_inst_issued_all__read
#define bmg__vector_engine_profile__xve_inst_issued_all__read \
    lnl__render_basic__load_store_cache_byte_read__read
#define bmg__vector_engine_profile__xve_multiple_pipe_active__read \
    lnl__vector_engine_profile__xve_multiple_pipe_active__read
#define bmg__vector_engine_profile__xve_pipe_alu0_and_alu1_active__read \
    lnl__vector_engine_profile__xve_pipe_alu0_and_alu1_active__read
#define bmg__vector_engine_profile__xve_pipe_alu0_and_alu2_active__read \
    lnl__vector_engine_profile__xve_pipe_alu0_and_alu2_active__read
#define bmg__vector_engine_profile__xve_threads_occupancy_all__read \
    lnl__vector_engine_profile__xve_threads_occupancy_all__read
#define bmg__vector_engine_profile__l3_atomic_access__read \
    lnl__render_basic__pixel_blend__read
#define bmg__vector_engine_profile__l3_busy__read \
    lnl__vector_engine_profile__l3_busy__read
#define bmg__vector_engine_profile__l3_hit__read \
    lnl__render_basic__l3_read__read
#define bmg__vector_engine_profile__l3_input_available__read \
    lnl__vector_engine_profile__l3_input_available__read
#define bmg__vector_engine_profile__l3_miss__read \
    lnl__compute_basic__l3_write__read
#define bmg__vector_engine_profile__l3_output_ready__read \
    lnl__compute_basic__l3_stall__read
#define bmg__vector_engine_profile__l3_read__read \
    lnl__compute_basic__compressor_input__read
#define bmg__vector_engine_profile__l3_stall__read \
    lnl__vector_engine_profile__l3_stall__read
#define bmg__vector_engine_profile__l3_superq_full__read \
    lnl__vector_engine_profile__l3_superq_full__read
#define bmg__vector_engine_profile__l3_write__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
#define bmg__vector_engine_profile__command_parser_compute_engine_busy__read \
    lnl__vector_engine_profile__command_parser_compute_engine_busy__read
#define bmg__vector_engine_profile__command_parser_compute_engine_dispatch_kernel_count__read \
    lnl__render_basic__ia_primitive__read
#define bmg__vector_engine_profile__command_parser_render_engine_busy__read \
    lnl__vector_engine_profile__command_parser_render_engine_busy__read
#define bmg__vector_engine_profile__command_parser_render_engine_dispatch_kernel_count__read \
    lnl__render_basic__stripsfan_object_count__read
#define bmg__vector_engine_profile__compressor_input__read \
    lnl__render_basic__stripsfan_object_cull__read
#define bmg__vector_engine_profile__compressor_output__read \
    lnl__render_basic__streamout_primitive_write_count__read
#define bmg__vector_engine_profile__gpu_memory_byte_read__read \
    lnl__vector_engine_profile__gpu_memory_byte_read__read
#define bmg__vector_engine_profile__gpu_memory_byte_write__read \
    lnl__vector_engine_profile__gpu_memory_byte_write__read
#define bmg__vector_engine_profile__gpu_memory_byte_read_rate__read \
    lnl__vector_engine_profile__gpu_memory_byte_read_rate__read
#define bmg__vector_engine_profile__gpu_memory_byte_write_rate__read \
    lnl__vector_engine_profile__gpu_memory_byte_write_rate__read
#define bmg__vector_engine_profile__tlb_miss__read \
    lnl__render_basic__tlb_miss__read
#define bmg__vector_engine_profile__gpu_memory_request_queue_full__read \
    lnl__render_basic__gpu_memory_request_queue_full__read
#define bmg__vector_engine_stalls__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__vector_engine_stalls__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__vector_engine_stalls__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__vector_engine_stalls__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__vector_engine_stalls__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define bmg__vector_engine_stalls__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define bmg__vector_engine_stalls__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define bmg__vector_engine_stalls__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define bmg__vector_engine_stalls__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define bmg__vector_engine_stalls__xve_stall_aluwr__read \
    lnl__vector_engine_stalls__xve_stall_aluwr__read
#define bmg__vector_engine_stalls__xve_stall_barrier__read \
    lnl__vector_engine_stalls__xve_stall_barrier__read
#define bmg__vector_engine_stalls__xve_stall_control__read \
    lnl__compute_basic__xve_active__read
#define bmg__vector_engine_stalls__xve_stall_instfetch__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
#define bmg__vector_engine_stalls__xve_stall_other__read \
    lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read
#define bmg__vector_engine_stalls__xve_stall_pipestall__read \
    lnl__vector_engine_stalls__xve_stall_pipestall__read
#define bmg__vector_engine_stalls__xve_stall_ps_dependency__read \
    lnl__compute_basic__xve_shared_function_access_hold__read
#define bmg__vector_engine_stalls__xve_stall_sbid__read \
    lnl__compute_basic__xve_stall__read
#define bmg__vector_engine_stalls__xve_stall_sendwr__read \
    lnl__render_basic__xve_active__read
#define bmg__vector_engine_stalls__thread_dispatch_queue0_active__read \
    lnl__render_pipe_profile__thread_dispatch_queue0_active__read
#define bmg__vector_engine_stalls__thread_dispatch_queue0_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue0_stall__read
#define bmg__vector_engine_stalls__thread_dispatch_queue1_active__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_active__read
#define bmg__vector_engine_stalls__thread_dispatch_queue1_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_stall__read
#define bmg__vector_engine_stalls__threadgroup_dispatch_queue0_resource_stall__read \
    lnl__render_pipe_profile__threadgroup_dispatch_queue0_resource_stall__read
#define bmg__vector_engine_stalls__threadgroup_dispatch_queue1_resource_stall__read \
    lnl__render_pipe_profile__threadgroup_dispatch_queue1_resource_stall__read
#define bmg__vector_engine_stalls__xve_active__read \
    lnl__vector_engine_stalls__xve_active__read
#define bmg__vector_engine_stalls__xve_shared_function_access_hold__read \
    lnl__vector_engine_stalls__xve_shared_function_access_hold__read
#define bmg__vector_engine_stalls__xve_stall__read \
    lnl__vector_engine_stalls__xve_stall__read
#define bmg__vector_engine_stalls__xve_threads_occupancy_all__read \
    lnl__vector_engine_stalls__xve_threads_occupancy_all__read
#define bmg__vector_engine_stalls__xve_multiple_pipe_active__read \
    lnl__vector_engine_stalls__xve_multiple_pipe_active__read
#define bmg__vector_engine_stalls__xve_pipe_alu0_and_alu1_active__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu1_active__read
#define bmg__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read
#define bmg__xve_pipeline_rasterization_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__xve_pipeline_rasterization_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__xve_pipeline_rasterization_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__xve_pipeline_rasterization_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__xve_pipeline_rasterization_profile__xve_active__read \
    lnl__xve_pipeline_rasterization_profile__xve_active__read
#define bmg__xve_pipeline_rasterization_profile__xve_stall__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_all_utilization__read \
    lnl__vector_engine_stalls__xve_stall_aluwr__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_all_utilization__read \
    lnl__vector_engine_stalls__xve_stall_barrier__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu2_all_utilization__read \
    lnl__compute_basic__xve_active__read
#define bmg__xve_pipeline_rasterization_profile__xve_pipe_alu0_and_alu1_active__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
#define bmg__xve_pipeline_rasterization_profile__xve_pipe_alu0_and_alu2_active__read \
    lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read
#define bmg__xve_pipeline_rasterization_profile__xve_multiple_pipe_active__read \
    lnl__vector_engine_stalls__xve_stall_pipestall__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_vs_utilization__read \
    lnl__vector_engine_stalls__xve_shared_function_access_hold__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ms_utilization__read \
    lnl__vector_engine_stalls__xve_stall__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ts_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ts_utilization__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ps_utilization__read \
    lnl__vector_engine_stalls__xve_multiple_pipe_active__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_async_cs_utilization__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu1_active__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_cs_utilization__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_vs_utilization__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu1_active__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ms_utilization__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu2_active__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ts_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ts_utilization__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ps_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ps_utilization__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_async_cs_utilization__read \
    lnl__vector_engine_profile__xve_multiple_pipe_active__read
#define bmg__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_cs_utilization__read \
    lnl__vector_engine_profile__xve_pipe_alu0_and_alu1_active__read
#define bmg__xve_pipeline_rasterization_profile__xve_threads_occupancy_all__read \
    lnl__xve_pipeline_rasterization_profile__xve_threads_occupancy_all__read
#define bmg__xve_pipeline_rasterization_profile__xve_stall_aluwr__read \
    lnl__compute_basic__xve_shared_function_access_hold__read
#define bmg__xve_pipeline_rasterization_profile__xve_stall_barrier__read \
    lnl__compute_basic__xve_stall__read
#define bmg__xve_pipeline_rasterization_profile__xve_stall_control__read \
    lnl__render_basic__xve_active__read
#define bmg__xve_pipeline_rasterization_profile__xve_stall_instfetch__read \
    lnl__render_basic__xve_inst_executed_alu0_all_utilization__read
#define bmg__xve_pipeline_rasterization_profile__xve_stall_other__read \
    lnl__render_basic__xve_inst_executed_alu1_all_utilization__read
#define bmg__xve_pipeline_rasterization_profile__xve_stall_pipestall__read \
    lnl__render_basic__xve_shared_function_access_hold__read
#define bmg__xve_pipeline_rasterization_profile__xve_stall_ps_dependency__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_ps_dependency__read
#define bmg__xve_pipeline_rasterization_profile__xve_stall_sbid__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_sbid__read
#define bmg__xve_pipeline_rasterization_profile__xve_stall_sendwr__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_sendwr__read
#define bmg__xve_pipeline_raytracing_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__xve_pipeline_raytracing_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__xve_pipeline_raytracing_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__xve_pipeline_raytracing_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__xve_pipeline_raytracing_profile__xve_active__read \
    lnl__xve_pipeline_rasterization_profile__xve_active__read
#define bmg__xve_pipeline_raytracing_profile__xve_stall__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_all_utilization__read \
    lnl__vector_engine_stalls__xve_stall_aluwr__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_all_utilization__read \
    lnl__vector_engine_stalls__xve_stall_barrier__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu2_all_utilization__read \
    lnl__compute_basic__xve_active__read
#define bmg__xve_pipeline_raytracing_profile__xve_pipe_alu0_and_alu1_active__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
#define bmg__xve_pipeline_raytracing_profile__xve_pipe_alu0_and_alu2_active__read \
    lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read
#define bmg__xve_pipeline_raytracing_profile__xve_multiple_pipe_active__read \
    lnl__vector_engine_stalls__xve_stall_pipestall__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_rt_ahs_utilization__read \
    lnl__vector_engine_stalls__xve_shared_function_access_hold__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_rt_chs_utilization__read \
    lnl__vector_engine_stalls__xve_stall__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_rt_ms_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ts_utilization__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_ps_utilization__read \
    lnl__vector_engine_stalls__xve_multiple_pipe_active__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_async_cs_utilization__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu1_active__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_cs_utilization__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_rt_ahs_utilization__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu1_active__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_rt_chs_utilization__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu2_active__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_rt_ms_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ts_utilization__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_ps_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ps_utilization__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_async_cs_utilization__read \
    lnl__vector_engine_profile__xve_multiple_pipe_active__read
#define bmg__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_cs_utilization__read \
    lnl__vector_engine_profile__xve_pipe_alu0_and_alu1_active__read
#define bmg__xve_pipeline_raytracing_profile__xve_threads_occupancy_all__read \
    lnl__xve_pipeline_rasterization_profile__xve_threads_occupancy_all__read
#define bmg__xve_pipeline_raytracing_profile__xve_stall_aluwr__read \
    lnl__compute_basic__xve_shared_function_access_hold__read
#define bmg__xve_pipeline_raytracing_profile__xve_stall_barrier__read \
    lnl__compute_basic__xve_stall__read
#define bmg__xve_pipeline_raytracing_profile__xve_stall_control__read \
    lnl__render_basic__xve_active__read
#define bmg__xve_pipeline_raytracing_profile__xve_stall_instfetch__read \
    lnl__render_basic__xve_inst_executed_alu0_all_utilization__read
#define bmg__xve_pipeline_raytracing_profile__xve_stall_other__read \
    lnl__render_basic__xve_inst_executed_alu1_all_utilization__read
#define bmg__xve_pipeline_raytracing_profile__xve_stall_pipestall__read \
    lnl__render_basic__xve_shared_function_access_hold__read
#define bmg__xve_pipeline_raytracing_profile__xve_stall_ps_dependency__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_ps_dependency__read
#define bmg__xve_pipeline_raytracing_profile__xve_stall_sbid__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_sbid__read
#define bmg__xve_pipeline_raytracing_profile__xve_stall_sendwr__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_sendwr__read
#define bmg__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__test_oa__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define bmg__test_oa__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define bmg__test_oa__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define bmg__test_oa__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define bmg__test_oa__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define bmg__test_oa__test_event1__read \
    lnl__render_pipe_profile__ps_output_available__read
#define bmg__test_oa__test_event1_cycles__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define bmg__test_oa__test_event1_cycles_xecore0__read \
    lnl__render_basic__shader_pix_kill__read
#define bmg__test_oa__test_event1_cycles_xecore1__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define bmg__test_oa__test_event1_cycles_xecore2__read \
    lnl__render_basic__sampler_2_x2_read__read
#define bmg__test_oa__test_event1_cycles_xecore3__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define bmg__test_oa__test_event1_cycles_xecore4__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define bmg__test_oa__test_event1_cycles_xecore5__read \
    lnl__render_basic__icache_hit__read
#define bmg__test_oa__test_event1_cycles_xecore6__read \
    lnl__render_basic__icache_miss__read
#define bmg__test_oa__test_event1_cycles_xecore7__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define bmg__test_oa__test_event1_cycles_xecore8__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define bmg__test_oa__test_event1_cycles_xecore9__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define bmg__test_oa__test_event1_cycles_xecore10__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define bmg__test_oa__test_event1_cycles_xecore11__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define bmg__test_oa__test_event1_cycles_xecore12__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define bmg__test_oa__test_event1_cycles_xecore13__read \
    lnl__render_basic__load_store_cache_hit__read
#define bmg__test_oa__test_event1_cycles_xecore14__read \
    lnl__render_basic__load_store_cache_access__read
#define bmg__test_oa__test_event1_cycles_xecore15__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define bmg__test_oa__test_event1_cycles_xecore16__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define bmg__test_oa__test_event1_cycles_xecore17__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define bmg__test_oa__test_event1_cycles_xecore18__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define bmg__test_oa__test_event1_cycles_xecore19__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define bmg__test_oa__test_event1_cycles_xecore20__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define bmg__test_oa__test_event1_cycles_xecore21__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
#define bmg__test_oa__test_event1_cycles_xecore22__read \
    lnl__rt_profile__xve_inst_executed_alu1_rt_ms__read
#define bmg__test_oa__test_event1_cycles_xecore23__read \
    lnl__render_basic__xve_inst_issued_all__read
#define bmg__test_oa__test_event1_cycles_xecore24__read \
    lnl__render_basic__load_store_cache_byte_read__read
#define bmg__test_oa__test_event1_cycles_xecore25__read \
    lnl__render_basic__load_store_cache_byte_write__read
#define bmg__test_oa__test_event1_cycles_xecore26__read \
    lnl__render_basic__slm_byte_read__read
#define bmg__test_oa__test_event1_cycles_xecore27__read \
    lnl__render_basic__slm_byte_write__read
#define bmg__test_oa__test_event1_cycles_average__read \
    lnl__test_oa__test_event1_cycles_average__read
#define bmg__test_oa__test_event2__read \
    lnl__test_oa__test_event2__read
#define bmg__test_oa__test_event2_cycles__read \
    lnl__render_basic__pixel_blend__read
#define bmg__media_set2__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__media_set2__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__media_set2__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__media_set2__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__media_set2__command_parser_video_enhancement_engine0_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define bmg__media_set2__video_enhancement_box0_read_request__read \
    tglgt1__render_basic__vs_threads__read
#define bmg__media_set2__video_enhancement_box0_write_request__read \
    tglgt1__render_basic__hs_threads__read
#define bmg__media_set2__command_parser_video_enhancement_engine1_busy__read \
    lnl__media_set2__command_parser_video_enhancement_engine1_busy__read
#define bmg__media_set2__video_enhancement_box1_read_request__read \
    tglgt1__render_basic__cs_threads__read
#define bmg__media_set2__video_enhancement_box1_write_request__read \
    tglgt1__render_basic__gs_threads__read
#define bmg__media_set1__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define bmg__media_set1__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define bmg__media_set1__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define bmg__media_set1__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define bmg__media_set1__media_read_request__read \
    lnl__media_set1__media_read_request__read
#define bmg__media_set1__media_write_request__read \
    tglgt1__render_basic__vs_threads__read
#define bmg__media_set1__command_parser_video_decode_engine0_busy__read \
    lnl__media_set1__command_parser_video_decode_engine0_busy__read
#define bmg__media_set1__video_decode_box0_read_request__read \
    tglgt1__render_basic__ds_threads__read
#define bmg__media_set1__video_decode_box0_write_request__read \
    tglgt1__render_basic__cs_threads__read
#define bmg__media_set1__command_parser_video_decode_engine1_busy__read \
    lnl__media_set1__command_parser_video_decode_engine1_busy__read
#define bmg__media_set1__video_decode_box1_read_request__read \
    tglgt1__render_basic__ps_threads__read
#define bmg__media_set1__video_decode_box1_write_request__read \
    lnl__media_set1__video_decode_box1_write_request__read
#define ptl__render_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__render_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__render_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__render_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__render_basic__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define ptl__render_basic__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define ptl__render_basic__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define ptl__render_basic__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define ptl__render_basic__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define ptl__render_basic__pixel_blend__read \
    lnl__render_basic__pixel_blend__read
#define ptl__render_basic__pixel_write__read \
    lnl__render_basic__pixel_write__read
#define ptl__render_basic__postps_alpha_test_fail__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define ptl__render_basic__shader_pix_kill__read \
    lnl__render_basic__shader_pix_kill__read
#define ptl__render_basic__l3_read__read \
    lnl__render_basic__l3_read__read
#define ptl__render_basic__l3_write__read \
    lnl__render_basic__l3_write__read
#define ptl__render_basic__command_parser_compute_engine_busy__read \
    lnl__render_basic__command_parser_compute_engine_busy__read
#define ptl__render_basic__command_parser_render_engine_busy__read \
    lnl__render_basic__command_parser_render_engine_busy__read
#define ptl__render_basic__command_parser_copy_engine_busy__read \
    lnl__render_basic__command_parser_copy_engine_busy__read
#define ptl__render_basic__clipper_input_vertex__read \
    lnl__render_basic__clipper_input_vertex__read
#define ptl__render_basic__clipper_primitive_cull__read \
    lnl__render_basic__clipper_primitive_cull__read
#define ptl__render_basic__clipper_primitive_far_near_clip__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
#define ptl__render_basic__clipper_primitive_output__read \
    lnl__render_basic__clipper_primitive_output__read
#define ptl__render_basic__ia_primitive__read \
    lnl__render_basic__ia_primitive__read
#define ptl__render_basic__streamout_output_vertex_count__read \
    lnl__render_basic__streamout_output_vertex_count__read
#define ptl__render_basic__stripsfan_object_count__read \
    lnl__render_basic__stripsfan_object_count__read
#define ptl__render_basic__stripsfan_object_cull__read \
    lnl__render_basic__stripsfan_object_cull__read
#define ptl__render_basic__streamout_primitive_write_count__read \
    lnl__render_basic__streamout_primitive_write_count__read
#define ptl__render_basic__slm_bank_conflict_count__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define ptl__render_basic__compressor_input__read \
    lnl__render_basic__compressor_input__read
#define ptl__render_basic__compressor_output__read \
    lnl__render_basic__compressor_output__read
#define ptl__render_basic__tlb_miss__read \
    lnl__render_basic__tlb_miss__read
#define ptl__render_basic__gpu_memory_request_queue_full__read \
    lnl__render_basic__gpu_memory_request_queue_full__read
#define ptl__render_basic__sampler_2_x2_read__read \
    lnl__render_basic__sampler_2_x2_read__read
#define ptl__render_basic__sampler_texture_cache_access__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define ptl__render_basic__sampler_texture_cache_miss__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define ptl__render_basic__urb_read__read \
    lnl__render_basic__urb_read__read
#define ptl__render_basic__urb_write__read \
    lnl__render_basic__urb_write__read
#define ptl__render_basic__icache_hit__read \
    lnl__render_basic__icache_hit__read
#define ptl__render_basic__icache_miss__read \
    lnl__render_basic__icache_miss__read
#define ptl__render_basic__xve_active__read \
    lnl__render_basic__xve_active__read
#define ptl__render_basic__xve_inst_executed_alu0_all__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define ptl__render_basic__xve_inst_executed_alu1_all__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define ptl__render_basic__xve_inst_executed_send_all__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define ptl__render_basic__xve_inst_executed_alu0_cs__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define ptl__render_basic__xve_inst_executed_alu0_ps__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define ptl__render_basic__xve_inst_executed_alu0_vs__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define ptl__render_basic__xve_inst_executed_alu1_cs__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define ptl__render_basic__xve_inst_executed_alu1_ps__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define ptl__render_basic__xve_inst_executed_alu1_vs__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
#define ptl__render_basic__xve_shared_function_access_hold__read \
    lnl__render_basic__xve_shared_function_access_hold__read
#define ptl__render_basic__rt_bvh_cache_miss__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define ptl__render_basic__rt_input_message_ray_count__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define ptl__render_basic__load_store_cache_hit__read \
    lnl__render_basic__load_store_cache_hit__read
#define ptl__render_basic__load_store_cache_access__read \
    lnl__render_basic__load_store_cache_access__read
double
ptl__render_basic__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
#define ptl__render_basic__xve_inst_issued_all__read \
    lnl__render_basic__xve_inst_issued_all__read
#define ptl__render_basic__gpu_memory_byte_read__read \
    lnl__device_cache_profile__l3_read__read
#define ptl__render_basic__gpu_memory_byte_write__read \
    bmg__compute_basic__sysmem_transaction_write__read
#define ptl__render_basic__load_store_cache_byte_read__read \
    lnl__render_basic__load_store_cache_byte_read__read
#define ptl__render_basic__load_store_cache_byte_write__read \
    lnl__render_basic__load_store_cache_byte_write__read
#define ptl__render_basic__slm_byte_read__read \
    lnl__render_basic__slm_byte_read__read
#define ptl__render_basic__slm_byte_write__read \
    lnl__render_basic__slm_byte_write__read
double
ptl__render_basic__gpu_memory_byte_read_rate__read(const struct intel_xe_perf *perf,
                                                   const struct intel_xe_perf_metric_set *metric_set,
                                                   uint64_t *accumulator);
double
ptl__render_basic__gpu_memory_byte_write_rate__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
#define ptl__render_basic__xve_stall__read \
    lnl__render_basic__xve_stall__read
#define ptl__render_basic__xve_inst_executed_alu0_all_utilization__read \
    lnl__render_basic__xve_inst_executed_alu0_all_utilization__read
#define ptl__render_basic__xve_inst_executed_alu1_all_utilization__read \
    lnl__render_basic__xve_inst_executed_alu1_all_utilization__read
#define ptl__compute_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__compute_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__compute_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__compute_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__compute_basic__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define ptl__compute_basic__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define ptl__compute_basic__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define ptl__compute_basic__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define ptl__compute_basic__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define ptl__compute_basic__icache_hit__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define ptl__compute_basic__icache_miss__read \
    lnl__render_basic__shader_pix_kill__read
#define ptl__compute_basic__xve_active__read \
    lnl__compute_basic__xve_active__read
#define ptl__compute_basic__xve_inst_executed_alu0_all__read \
    lnl__render_basic__sampler_2_x2_read__read
#define ptl__compute_basic__xve_inst_executed_alu1_all__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define ptl__compute_basic__xve_inst_executed_send_all__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define ptl__compute_basic__xve_inst_issued_all__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define ptl__compute_basic__xve_shared_function_access_hold__read \
    lnl__compute_basic__xve_shared_function_access_hold__read
#define ptl__compute_basic__xve_stall__read \
    lnl__compute_basic__xve_stall__read
double
ptl__compute_basic__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
#define ptl__compute_basic__xve_inst_executed_alu2_all__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define ptl__compute_basic__xve_multiple_pipe_active__read \
    lnl__render_basic__xve_inst_executed_alu1_all_utilization__read
#define ptl__compute_basic__load_store_cache_partial_write_count__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define ptl__compute_basic__slm_bank_conflict_count__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define ptl__compute_basic__slm_byte_read__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define ptl__compute_basic__slm_byte_write__read \
    lnl__render_basic__load_store_cache_hit__read
#define ptl__compute_basic__load_store_cache_byte_read__read \
    lnl__render_basic__load_store_cache_access__read
#define ptl__compute_basic__load_store_cache_byte_write__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define ptl__compute_basic__load_store_cache_access__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define ptl__compute_basic__load_store_cache_hit__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define ptl__compute_basic__l3_atomic_access__read \
    lnl__render_basic__pixel_blend__read
#define ptl__compute_basic__l3_hit__read \
    lnl__render_basic__pixel_write__read
#define ptl__compute_basic__l3_miss__read \
    lnl__render_basic__l3_read__read
#define ptl__compute_basic__l3_read__read \
    lnl__render_basic__l3_write__read
#define ptl__compute_basic__l3_write__read \
    lnl__compute_basic__l3_write__read
#define ptl__compute_basic__l3_stall__read \
    lnl__compute_basic__l3_stall__read
#define ptl__compute_basic__compressor_input__read \
    lnl__compute_basic__compressor_input__read
#define ptl__compute_basic__compressor_output__read \
    lnl__render_basic__clipper_input_vertex__read
#define ptl__compute_basic__gpu_memory_byte_read__read \
    lnl__render_basic__clipper_primitive_cull__read
#define ptl__compute_basic__gpu_memory_byte_write__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
double
ptl__compute_basic__gpu_memory_byte_read_rate__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
double
ptl__compute_basic__gpu_memory_byte_write_rate__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
#define ptl__compute_basic__gpu_memory_l3_read__read \
    lnl__render_basic__clipper_primitive_output__read
#define ptl__compute_basic__gpu_memory_l3_write__read \
    lnl__render_basic__ia_primitive__read
#define ptl__compute_basic__gpu_memory_request_queue_full__read \
    lnl__compute_basic__gpu_memory_request_queue_full__read
#define ptl__compute_basic__tlb_miss__read \
    lnl__render_basic__stripsfan_object_count__read
#define ptl__compute_basic__async_gpgpu_thread_exit_count__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define ptl__compute_basic__gpgpu_dispatch__read \
    lnl__compute_basic__gpgpu_dispatch__read
#define ptl__compute_basic__command_parser_compute_engine_busy__read \
    lnl__compute_basic__command_parser_compute_engine_busy__read
#define ptl__compute_basic__command_parser_compute_engine_dispatch_kernel_count__read \
    lnl__render_basic__streamout_primitive_write_count__read
#define ptl__compute_basic__command_parser_copy_engine_busy__read \
    lnl__compute_basic__command_parser_copy_engine_busy__read
#define ptl__compute_basic__command_parser_flush_count__read \
    lnl__render_basic__compressor_output__read
#define ptl__compute_basic__command_parser_render_engine_busy__read \
    lnl__compute_basic__command_parser_render_engine_busy__read
#define ptl__compute_basic__command_parser_render_engine_dispatch_kernel_count__read \
    lnl__compute_basic__command_parser_render_engine_dispatch_kernel_count__read
#define ptl__compute_basic__xve_pipe_alu0_and_alu1_active__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu1_active__read
#define ptl__compute_basic__xve_pipe_alu0_and_alu2_active__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu2_active__read
#define ptl__compute_basic__xve_inst_executed_alu0_all_utilization__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
#define ptl__compute_basic__xve_inst_executed_alu1_all_utilization__read \
    lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read
#define ptl__compute_basic__xve_inst_executed_alu2_all_utilization__read \
    lnl__render_basic__xve_inst_executed_alu0_all_utilization__read
#define ptl__depth_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__depth_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__depth_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__depth_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__depth_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define ptl__depth_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define ptl__depth_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define ptl__depth_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define ptl__depth_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define ptl__depth_profile__early_depth_stencil_test_fail_np__read \
    lnl__render_basic__pixel_blend__read
#define ptl__depth_profile__early_depth_stencil_test_fail_p__read \
    lnl__render_basic__pixel_write__read
#define ptl__depth_profile__hiz_depth_test_ambig_np__read \
    lnl__render_basic__l3_read__read
#define ptl__depth_profile__hiz_depth_test_ambig_p__read \
    lnl__render_basic__l3_write__read
#define ptl__depth_profile__hiz_depth_test_fail_np__read \
    lnl__compute_basic__l3_write__read
#define ptl__depth_profile__hiz_depth_test_fail_p__read \
    lnl__depth_profile__hiz_depth_test_fail_p__read
#define ptl__depth_profile__hiz_depth_test_pass_p__read \
    lnl__compute_basic__compressor_input__read
#define ptl__depth_profile__hiz_subspan_latency_fifofull__read \
    lnl__depth_profile__hiz_subspan_latency_fifofull__read
#define ptl__depth_profile__iz_output_ready__read \
    lnl__depth_profile__iz_output_ready__read
#define ptl__depth_profile__iz_subspan_latency_fifofull__read \
    lnl__depth_profile__iz_subspan_latency_fifofull__read
#define ptl__depth_profile__postps_depth_stencil_test_fail__read \
    lnl__render_basic__clipper_primitive_output__read
#define ptl__depth_profile__render_cache_alloc__read \
    lnl__render_basic__ia_primitive__read
#define ptl__depth_profile__render_cache_hit__read \
    lnl__render_basic__streamout_output_vertex_count__read
#define ptl__depth_profile__render_cache_read__read \
    lnl__render_basic__stripsfan_object_count__read
#define ptl__depth_profile__render_cache_write__read \
    lnl__render_basic__stripsfan_object_cull__read
#define ptl__depth_profile__urb_cross_slice_read__read \
    lnl__render_basic__streamout_primitive_write_count__read
#define ptl__depth_profile__pixel_2_x2_lit_post_rasterizer_early_depth__read \
    lnl__render_basic__compressor_input__read
#define ptl__depth_profile__pixel_2_x2_lit_post_rasterizer_late_depth__read \
    lnl__render_basic__compressor_output__read
#define ptl__depth_profile__gpu_memory_active__read \
    lnl__depth_profile__gpu_memory_active__read
#define ptl__device_cache_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__device_cache_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__device_cache_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__device_cache_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__device_cache_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define ptl__device_cache_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define ptl__device_cache_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define ptl__device_cache_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define ptl__device_cache_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define ptl__device_cache_profile__amfs_l3_access__read \
    lnl__render_basic__pixel_blend__read
#define ptl__device_cache_profile__amfs_l3_atomic__read \
    lnl__render_basic__pixel_write__read
#define ptl__device_cache_profile__amfs_l3_hit__read \
    lnl__render_basic__l3_read__read
#define ptl__device_cache_profile__amfs_l3_write__read \
    lnl__render_basic__l3_write__read
#define ptl__device_cache_profile__color_l3_access__read \
    lnl__compute_basic__l3_write__read
#define ptl__device_cache_profile__color_l3_hit__read \
    lnl__depth_profile__hiz_depth_test_fail_p__read
#define ptl__device_cache_profile__icache_l3_hit__read \
    lnl__compute_basic__compressor_input__read
#define ptl__device_cache_profile__icache_l3_read__read \
    lnl__render_basic__clipper_input_vertex__read
#define ptl__device_cache_profile__load_store_cache_l3_hit__read \
    lnl__render_basic__clipper_primitive_cull__read
#define ptl__device_cache_profile__load_store_cache_l3_read__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
#define ptl__device_cache_profile__load_store_cache_l3_write__read \
    lnl__render_basic__clipper_primitive_output__read
#define ptl__device_cache_profile__sampler_l3_hit__read \
    lnl__render_basic__ia_primitive__read
#define ptl__device_cache_profile__sampler_l3_read__read \
    lnl__render_basic__streamout_output_vertex_count__read
#define ptl__device_cache_profile__z_l3_access__read \
    lnl__render_basic__stripsfan_object_count__read
#define ptl__device_cache_profile__z_l3_hit__read \
    lnl__render_basic__stripsfan_object_cull__read
#define ptl__device_cache_profile__l3_busy__read \
    lnl__device_cache_profile__l3_busy__read
#define ptl__device_cache_profile__l3_input_available__read \
    lnl__device_cache_profile__l3_input_available__read
#define ptl__device_cache_profile__l3_output_ready__read \
    lnl__device_cache_profile__l3_output_ready__read
#define ptl__device_cache_profile__l3_superq_full__read \
    lnl__device_cache_profile__l3_superq_full__read
#define ptl__device_cache_profile__l3_atomic_access__read \
    lnl__compute_basic__command_parser_render_engine_dispatch_kernel_count__read
#define ptl__device_cache_profile__l3_hit__read \
    lnl__render_basic__urb_read__read
#define ptl__device_cache_profile__l3_miss__read \
    lnl__render_basic__urb_write__read
#define ptl__device_cache_profile__l3_read__read \
    lnl__device_cache_profile__l3_read__read
#define ptl__device_cache_profile__l3_stall__read \
    lnl__device_cache_profile__l3_stall__read
#define ptl__device_cache_profile__l3_write__read \
    lnl__device_cache_profile__l3_write__read
#define ptl__device_cache_profile__gpu_memory_l3_read__read \
    lnl__device_cache_profile__gpu_memory_l3_read__read
#define ptl__device_cache_profile__gpu_memory_l3_write__read \
    lnl__device_cache_profile__gpu_memory_l3_write__read
#define ptl__device_cache_profile__gpu_memory_read__read \
    lnl__device_cache_profile__gpu_memory_read__read
#define ptl__device_cache_profile__gpu_memory_write__read \
    lnl__device_cache_profile__gpu_memory_write__read
#define ptl__memory_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__memory_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__memory_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__memory_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__memory_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define ptl__memory_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define ptl__memory_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define ptl__memory_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define ptl__memory_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define ptl__memory_profile__compressor_input__read \
    lnl__render_basic__pixel_blend__read
#define ptl__memory_profile__compressor_output__read \
    lnl__render_basic__pixel_write__read
#define ptl__memory_profile__gpu_memory_32_b_transaction_read__read \
    lnl__render_basic__l3_read__read
#define ptl__memory_profile__gpu_memory_32_b_transaction_write__read \
    lnl__render_basic__l3_write__read
#define ptl__memory_profile__gpu_memory_64_b_transaction_read__read \
    lnl__compute_basic__l3_write__read
#define ptl__memory_profile__gpu_memory_64_b_transaction_write__read \
    lnl__depth_profile__hiz_depth_test_fail_p__read
#define ptl__memory_profile__gpu_memory_byte_read__read \
    lnl__compute_basic__compressor_input__read
#define ptl__memory_profile__gpu_memory_byte_write__read \
    lnl__render_basic__clipper_input_vertex__read
double
ptl__memory_profile__gpu_memory_byte_read_rate__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
double
ptl__memory_profile__gpu_memory_byte_write_rate__read(const struct intel_xe_perf *perf,
                                                      const struct intel_xe_perf_metric_set *metric_set,
                                                      uint64_t *accumulator);
#define ptl__memory_profile__gpu_memory_l3_read__read \
    lnl__render_basic__clipper_primitive_cull__read
#define ptl__memory_profile__gpu_memory_l3_write__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
#define ptl__memory_profile__gpu_memory_request_queue_full__read \
    lnl__memory_profile__gpu_memory_request_queue_full__read
#define ptl__memory_profile__tlb_miss__read \
    lnl__render_basic__ia_primitive__read
#define ptl__memory_profile__l3_atomic_access__read \
    lnl__render_basic__streamout_output_vertex_count__read
#define ptl__memory_profile__l3_busy__read \
    lnl__memory_profile__l3_busy__read
#define ptl__memory_profile__l3_hit__read \
    lnl__render_basic__stripsfan_object_cull__read
#define ptl__memory_profile__l3_input_available__read \
    lnl__device_cache_profile__l3_busy__read
#define ptl__memory_profile__l3_miss__read \
    lnl__render_basic__compressor_input__read
#define ptl__memory_profile__l3_output_ready__read \
    lnl__device_cache_profile__l3_output_ready__read
#define ptl__memory_profile__l3_read__read \
    lnl__render_basic__tlb_miss__read
#define ptl__memory_profile__l3_stall__read \
    lnl__memory_profile__l3_stall__read
#define ptl__memory_profile__l3_superq_full__read \
    lnl__memory_profile__l3_superq_full__read
#define ptl__memory_profile__l3_write__read \
    lnl__render_basic__urb_write__read
#define ptl__memory_profile__load_store_cache_access__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define ptl__memory_profile__load_store_cache_byte_read__read \
    lnl__render_basic__shader_pix_kill__read
#define ptl__memory_profile__load_store_cache_byte_write__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define ptl__memory_profile__load_store_cache_hit__read \
    lnl__render_basic__sampler_2_x2_read__read
#define ptl__memory_profile__load_store_cache_input_available__read \
    lnl__memory_profile__load_store_cache_input_available__read
#define ptl__memory_profile__load_store_cache_number_of_bank_access_count__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define ptl__memory_profile__load_store_cache_output_ready__read \
    lnl__memory_profile__load_store_cache_output_ready__read
#define ptl__memory_profile__load_store_cache_partial_write_count__read \
    lnl__render_basic__icache_miss__read
#define ptl__memory_profile__slm_access_count__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define ptl__memory_profile__slm_bank_conflict_count__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define ptl__memory_profile__slm_byte_read__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define ptl__memory_profile__slm_byte_write__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define ptl__memory_profile__xve_load_store_cache_atomic_message_count__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define ptl__memory_profile__xve_load_store_cache_fence_message_count__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define ptl__memory_profile__xve_load_store_cache_read_message_count__read \
    lnl__render_basic__load_store_cache_hit__read
#define ptl__memory_profile__xve_load_store_cache_register_request_count__read \
    lnl__render_basic__load_store_cache_access__read
#define ptl__memory_profile__xve_load_store_cache_register_response_count__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define ptl__memory_profile__xve_load_store_cache_write_message_count__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define ptl__memory_profile__xve_slm_atomic_message_count__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define ptl__memory_profile__xve_slm_fence_message_count__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define ptl__memory_profile__xve_slm_read_message_count__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define ptl__memory_profile__xve_slm_write_message_count__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define ptl__memory_profile__copy_engine_read_request__read \
    lnl__device_cache_profile__l3_read__read
#define ptl__memory_profile__copy_engine_request_stall__read \
    lnl__memory_profile__copy_engine_request_stall__read
#define ptl__memory_profile__copy_engine_write_request__read \
    lnl__device_cache_profile__l3_write__read
#define ptl__memory_profile__rt_load_store_cache_read_message_count__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
#define ptl__memory_profile__rt_load_store_cache_write_from_message_count__read \
    lnl__rt_profile__xve_inst_executed_alu1_rt_ms__read
#define ptl__render_pipe_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__render_pipe_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__render_pipe_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__render_pipe_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__render_pipe_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define ptl__render_pipe_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define ptl__render_pipe_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define ptl__render_pipe_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define ptl__render_pipe_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define ptl__render_pipe_profile__clipper_input_available__read \
    lnl__render_pipe_profile__clipper_input_available__read
#define ptl__render_pipe_profile__clipper_output_ready__read \
    lnl__render_pipe_profile__clipper_output_ready__read
#define ptl__render_pipe_profile__clipper_transaction_output__read \
    lnl__render_basic__l3_read__read
#define ptl__render_pipe_profile__streamout_primitive_storage_need__read \
    lnl__render_basic__l3_write__read
#define ptl__render_pipe_profile__stripsfan_output_ready__read \
    lnl__render_pipe_profile__stripsfan_output_ready__read
#define ptl__render_pipe_profile__vertex_fetch_input_available__read \
    lnl__render_pipe_profile__vertex_fetch_input_available__read
#define ptl__render_pipe_profile__vertex_fetch_output_ready__read \
    lnl__render_pipe_profile__vertex_fetch_output_ready__read
#define ptl__render_pipe_profile__vs_output_ready__read \
    lnl__render_pipe_profile__vs_output_ready__read
#define ptl__render_pipe_profile__color_pipe_cache_latency1_stall__read \
    lnl__render_pipe_profile__color_pipe_cache_latency1_stall__read
#define ptl__render_pipe_profile__color_pipe_cache_latency2_stall__read \
    lnl__render_pipe_profile__color_pipe_cache_latency2_stall__read
#define ptl__render_pipe_profile__pixel_post_process_input_available__read \
    lnl__render_pipe_profile__pixel_post_process_input_available__read
#define ptl__render_pipe_profile__pixel_post_process_output_ready__read \
    lnl__render_pipe_profile__pixel_post_process_output_ready__read
#define ptl__render_pipe_profile__ps_output_available__read \
    lnl__render_pipe_profile__ps_output_available__read
#define ptl__render_pipe_profile__render_cache_input_available__read \
    lnl__render_pipe_profile__render_cache_input_available__read
#define ptl__render_pipe_profile__render_cache_output_ready__read \
    lnl__render_pipe_profile__render_cache_output_ready__read
#define ptl__render_pipe_profile__amfs_stall_all_input__read \
    lnl__render_pipe_profile__amfs_stall_all_input__read
#define ptl__render_pipe_profile__amfs_stall_any_input__read \
    lnl__render_pipe_profile__amfs_stall_any_input__read
#define ptl__render_pipe_profile__sampler_active__read \
    lnl__render_pipe_profile__sampler_active__read
#define ptl__render_pipe_profile__sampler_input_available__read \
    lnl__render_pipe_profile__sampler_input_available__read
#define ptl__render_pipe_profile__sampler_memory_latency_stall__read \
    lnl__render_pipe_profile__sampler_memory_latency_stall__read
#define ptl__render_pipe_profile__sampler_output_ready__read \
    lnl__memory_profile__load_store_cache_input_available__read
#define ptl__render_pipe_profile__rasterizer_input_available__read \
    lnl__render_pipe_profile__rasterizer_input_available__read
#define ptl__render_pipe_profile__rasterizer_output_ready__read \
    lnl__render_pipe_profile__rasterizer_output_ready__read
#define ptl__render_pipe_profile__rasterizer_transaction_output__read \
    lnl__render_basic__tlb_miss__read
#define ptl__render_pipe_profile__task_thread_exit_count__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define ptl__render_pipe_profile__task_threadgroup_count__read \
    lnl__render_basic__icache_hit__read
#define ptl__render_pipe_profile__thread_dispatch_input_available__read \
    lnl__render_pipe_profile__thread_dispatch_input_available__read
#define ptl__render_pipe_profile__thread_dispatch_ps_active__read \
    lnl__render_pipe_profile__thread_dispatch_ps_active__read
#define ptl__render_pipe_profile__thread_dispatch_queue0_active__read \
    lnl__render_pipe_profile__thread_dispatch_queue0_active__read
#define ptl__render_pipe_profile__thread_dispatch_queue0_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue0_stall__read
#define ptl__render_pipe_profile__thread_dispatch_queue1_active__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_active__read
#define ptl__render_pipe_profile__thread_dispatch_queue1_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_stall__read
#define ptl__render_pipe_profile__threadgroup_dispatch_queue0_resource_stall__read \
    lnl__render_pipe_profile__threadgroup_dispatch_queue0_resource_stall__read
#define ptl__render_pipe_profile__threadgroup_dispatch_queue1_resource_stall__read \
    lnl__render_pipe_profile__threadgroup_dispatch_queue1_resource_stall__read
#define ptl__render_pipe_profile__command_parser_render_engine_draw_count__read \
    lnl__compute_basic__command_parser_render_engine_dispatch_kernel_count__read
#define ptl__render_pipe_profile__amfs_4_x4_shading_request__read \
    lnl__render_basic__urb_read__read
#define ptl__render_pipe_profile__amfs_cache_hit__read \
    lnl__render_basic__urb_write__read
#define ptl__render_pipe_profile__amfs_cache_miss__read \
    lnl__device_cache_profile__l3_read__read
#define ptl__rt_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__rt_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__rt_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__rt_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__rt_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define ptl__rt_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define ptl__rt_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define ptl__rt_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define ptl__rt_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define ptl__rt_profile__rt_any_hit_thread_ray_dispatch__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define ptl__rt_profile__rt_callable_thread_ray_dispatch__read \
    lnl__render_basic__shader_pix_kill__read
#define ptl__rt_profile__rt_closest_hit_thread_ray_dispatch__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define ptl__rt_profile__rt_input_message_spawn_count__read \
    lnl__render_basic__sampler_2_x2_read__read
#define ptl__rt_profile__rt_instance_node_ray_count__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define ptl__rt_profile__rt_internal_node_ray_count__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define ptl__rt_profile__rt_intersection_thread_ray_dispatch__read \
    lnl__render_basic__icache_hit__read
#define ptl__rt_profile__rt_message_stall__read \
    lnl__render_pipe_profile__thread_dispatch_input_available__read
#define ptl__rt_profile__rt_miss_thread_ray_dispatch__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define ptl__rt_profile__rt_procedural_node_ray_count__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define ptl__rt_profile__rt_quad_leaf_ray_count__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define ptl__rt_profile__rt_quad_test_ray_count__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define ptl__rt_profile__rt_request_collision__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_stall__read
#define ptl__rt_profile__rt_transform_ray_count__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define ptl__rt_profile__rt_traversal_input_ray_count__read \
    lnl__render_basic__load_store_cache_hit__read
#define ptl__rt_profile__rt_traversal_output_ray_count__read \
    lnl__render_basic__load_store_cache_access__read
#define ptl__rt_profile__rt_traversal_stall__read \
    lnl__rt_profile__rt_traversal_stall__read
#define ptl__rt_profile__rt_traversal_step_ray_count__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define ptl__rt_profile__xve_inst_executed_alu0_rt_ahs__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define ptl__rt_profile__xve_inst_executed_alu0_rt_chs__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define ptl__rt_profile__xve_inst_executed_alu0_rt_ms__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define ptl__rt_profile__xve_inst_executed_alu1_rt_ahs__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define ptl__rt_profile__xve_inst_executed_alu1_rt_chs__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
#define ptl__rt_profile__xve_inst_executed_alu1_rt_ms__read \
    lnl__rt_profile__xve_inst_executed_alu1_rt_ms__read
double
ptl__rt_profile__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                 uint64_t *accumulator);
#define ptl__rt_profile__rt_bvh_cache_miss__read \
    lnl__render_basic__load_store_cache_byte_read__read
#define ptl__rt_profile__rt_input_message_ray_count__read \
    lnl__render_basic__load_store_cache_byte_write__read
#define ptl__rt_profile__rt_quad_leaf_stoc_ray_count__read \
    lnl__render_basic__slm_byte_read__read
#define ptl__rt_profile__rt_stoc_hit_opaque__read \
    lnl__render_basic__slm_byte_write__read
uint64_t
ptl__rt_profile__rt_stoc_hit_transparent__read(const struct intel_xe_perf *perf,
                                               const struct intel_xe_perf_metric_set *metric_set,
                                               uint64_t *accumulator);
#define ptl__vector_engine_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__vector_engine_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__vector_engine_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__vector_engine_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__vector_engine_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define ptl__vector_engine_profile__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define ptl__vector_engine_profile__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define ptl__vector_engine_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define ptl__vector_engine_profile__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define ptl__vector_engine_profile__icache_hit__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define ptl__vector_engine_profile__icache_miss__read \
    lnl__render_basic__shader_pix_kill__read
#define ptl__vector_engine_profile__xve_active__read \
    lnl__compute_basic__xve_active__read
#define ptl__vector_engine_profile__xve_inst_executed_alu0_all__read \
    lnl__render_basic__sampler_2_x2_read__read
#define ptl__vector_engine_profile__xve_inst_executed_alu1_all__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define ptl__vector_engine_profile__xve_inst_executed_alu2_all__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define ptl__vector_engine_profile__xve_inst_executed_barrier__read \
    lnl__render_basic__icache_hit__read
#define ptl__vector_engine_profile__xve_inst_executed_bitconv__read \
    lnl__render_basic__icache_miss__read
#define ptl__vector_engine_profile__xve_inst_executed_control_all__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define ptl__vector_engine_profile__xve_inst_executed_fp16__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define ptl__vector_engine_profile__xve_inst_executed_fp32__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define ptl__vector_engine_profile__xve_inst_executed_fp64__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define ptl__vector_engine_profile__xve_inst_executed_fp64_2_nd__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define ptl__vector_engine_profile__xve_inst_executed_int16__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define ptl__vector_engine_profile__xve_inst_executed_int32__read \
    lnl__render_basic__load_store_cache_hit__read
#define ptl__vector_engine_profile__xve_inst_executed_int64__read \
    lnl__render_basic__load_store_cache_access__read
#define ptl__vector_engine_profile__xve_inst_executed_math__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define ptl__vector_engine_profile__xve_inst_executed_nondivergent__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define ptl__vector_engine_profile__xve_inst_executed_predication__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define ptl__vector_engine_profile__xve_inst_executed_send_all__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define ptl__vector_engine_profile__xve_inst_executed_xmx_bf16__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define ptl__vector_engine_profile__xve_inst_executed_xmx_fp16__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define ptl__vector_engine_profile__xve_inst_executed_xmx_int2__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
#define ptl__vector_engine_profile__xve_inst_executed_xmx_int4__read \
    lnl__rt_profile__xve_inst_executed_alu1_rt_ms__read
#define ptl__vector_engine_profile__xve_inst_executed_xmx_int8__read \
    lnl__render_basic__xve_inst_issued_all__read
#define ptl__vector_engine_profile__xve_inst_issued_all__read \
    lnl__render_basic__load_store_cache_byte_read__read
#define ptl__vector_engine_profile__xve_multiple_pipe_active__read \
    lnl__vector_engine_profile__xve_multiple_pipe_active__read
#define ptl__vector_engine_profile__xve_pipe_alu0_and_alu1_active__read \
    lnl__vector_engine_profile__xve_pipe_alu0_and_alu1_active__read
#define ptl__vector_engine_profile__xve_pipe_alu0_and_alu2_active__read \
    lnl__vector_engine_profile__xve_pipe_alu0_and_alu2_active__read
double
ptl__vector_engine_profile__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                            const struct intel_xe_perf_metric_set *metric_set,
                                                            uint64_t *accumulator);
#define ptl__vector_engine_profile__l3_atomic_access__read \
    lnl__render_basic__pixel_blend__read
#define ptl__vector_engine_profile__l3_busy__read \
    lnl__vector_engine_profile__l3_busy__read
#define ptl__vector_engine_profile__l3_hit__read \
    lnl__render_basic__l3_read__read
#define ptl__vector_engine_profile__l3_input_available__read \
    lnl__vector_engine_profile__l3_input_available__read
#define ptl__vector_engine_profile__l3_miss__read \
    lnl__compute_basic__l3_write__read
#define ptl__vector_engine_profile__l3_output_ready__read \
    lnl__compute_basic__l3_stall__read
#define ptl__vector_engine_profile__l3_read__read \
    lnl__compute_basic__compressor_input__read
#define ptl__vector_engine_profile__l3_stall__read \
    lnl__vector_engine_profile__l3_stall__read
#define ptl__vector_engine_profile__l3_superq_full__read \
    lnl__vector_engine_profile__l3_superq_full__read
#define ptl__vector_engine_profile__l3_write__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
#define ptl__vector_engine_profile__command_parser_compute_engine_busy__read \
    lnl__vector_engine_profile__command_parser_compute_engine_busy__read
#define ptl__vector_engine_profile__command_parser_compute_engine_dispatch_kernel_count__read \
    lnl__render_basic__ia_primitive__read
#define ptl__vector_engine_profile__command_parser_render_engine_busy__read \
    lnl__vector_engine_profile__command_parser_render_engine_busy__read
#define ptl__vector_engine_profile__command_parser_render_engine_dispatch_kernel_count__read \
    lnl__render_basic__stripsfan_object_count__read
#define ptl__vector_engine_profile__compressor_input__read \
    lnl__render_basic__stripsfan_object_cull__read
#define ptl__vector_engine_profile__compressor_output__read \
    lnl__render_basic__streamout_primitive_write_count__read
#define ptl__vector_engine_profile__gpu_memory_byte_read__read \
    lnl__render_basic__compressor_input__read
#define ptl__vector_engine_profile__gpu_memory_byte_write__read \
    lnl__render_basic__compressor_output__read
double
ptl__vector_engine_profile__gpu_memory_byte_read_rate__read(const struct intel_xe_perf *perf,
                                                            const struct intel_xe_perf_metric_set *metric_set,
                                                            uint64_t *accumulator);
double
ptl__vector_engine_profile__gpu_memory_byte_write_rate__read(const struct intel_xe_perf *perf,
                                                             const struct intel_xe_perf_metric_set *metric_set,
                                                             uint64_t *accumulator);
#define ptl__vector_engine_profile__tlb_miss__read \
    lnl__render_basic__tlb_miss__read
#define ptl__vector_engine_profile__gpu_memory_request_queue_full__read \
    lnl__render_basic__gpu_memory_request_queue_full__read
#define ptl__vector_engine_stalls__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__vector_engine_stalls__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__vector_engine_stalls__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__vector_engine_stalls__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__vector_engine_stalls__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define ptl__vector_engine_stalls__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define ptl__vector_engine_stalls__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define ptl__vector_engine_stalls__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define ptl__vector_engine_stalls__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define ptl__vector_engine_stalls__xve_stall_aluwr__read \
    lnl__vector_engine_stalls__xve_stall_aluwr__read
#define ptl__vector_engine_stalls__xve_stall_barrier__read \
    lnl__vector_engine_stalls__xve_stall_barrier__read
#define ptl__vector_engine_stalls__xve_stall_control__read \
    lnl__compute_basic__xve_active__read
#define ptl__vector_engine_stalls__xve_stall_instfetch__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
#define ptl__vector_engine_stalls__xve_stall_other__read \
    lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read
#define ptl__vector_engine_stalls__xve_stall_pipestall__read \
    lnl__vector_engine_stalls__xve_stall_pipestall__read
#define ptl__vector_engine_stalls__xve_stall_ps_dependency__read \
    lnl__compute_basic__xve_shared_function_access_hold__read
#define ptl__vector_engine_stalls__xve_stall_sbid__read \
    lnl__compute_basic__xve_stall__read
#define ptl__vector_engine_stalls__xve_stall_sendwr__read \
    lnl__render_basic__xve_active__read
#define ptl__vector_engine_stalls__thread_dispatch_queue0_active__read \
    lnl__render_pipe_profile__thread_dispatch_queue0_active__read
#define ptl__vector_engine_stalls__thread_dispatch_queue0_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue0_stall__read
#define ptl__vector_engine_stalls__thread_dispatch_queue1_active__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_active__read
#define ptl__vector_engine_stalls__thread_dispatch_queue1_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_stall__read
#define ptl__vector_engine_stalls__threadgroup_dispatch_queue0_resource_stall__read \
    lnl__render_pipe_profile__threadgroup_dispatch_queue0_resource_stall__read
#define ptl__vector_engine_stalls__threadgroup_dispatch_queue1_resource_stall__read \
    lnl__render_pipe_profile__threadgroup_dispatch_queue1_resource_stall__read
#define ptl__vector_engine_stalls__xve_active__read \
    lnl__vector_engine_stalls__xve_active__read
#define ptl__vector_engine_stalls__xve_shared_function_access_hold__read \
    lnl__vector_engine_stalls__xve_shared_function_access_hold__read
#define ptl__vector_engine_stalls__xve_stall__read \
    lnl__vector_engine_stalls__xve_stall__read
double
ptl__vector_engine_stalls__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                           const struct intel_xe_perf_metric_set *metric_set,
                                                           uint64_t *accumulator);
#define ptl__vector_engine_stalls__xve_multiple_pipe_active__read \
    lnl__vector_engine_stalls__xve_multiple_pipe_active__read
#define ptl__vector_engine_stalls__xve_pipe_alu0_and_alu1_active__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu1_active__read
#define ptl__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read
#define ptl__xve_pipeline_rasterization_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__xve_pipeline_rasterization_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__xve_pipeline_rasterization_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__xve_pipeline_rasterization_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__xve_pipeline_rasterization_profile__xve_active__read \
    lnl__xve_pipeline_rasterization_profile__xve_active__read
#define ptl__xve_pipeline_rasterization_profile__xve_stall__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_all_utilization__read \
    lnl__vector_engine_stalls__xve_stall_aluwr__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_all_utilization__read \
    lnl__vector_engine_stalls__xve_stall_barrier__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu2_all_utilization__read \
    lnl__compute_basic__xve_active__read
#define ptl__xve_pipeline_rasterization_profile__xve_pipe_alu0_and_alu1_active__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
#define ptl__xve_pipeline_rasterization_profile__xve_pipe_alu0_and_alu2_active__read \
    lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read
#define ptl__xve_pipeline_rasterization_profile__xve_multiple_pipe_active__read \
    lnl__vector_engine_stalls__xve_stall_pipestall__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_vs_utilization__read \
    lnl__vector_engine_stalls__xve_shared_function_access_hold__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ms_utilization__read \
    lnl__vector_engine_stalls__xve_stall__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ts_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ts_utilization__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ps_utilization__read \
    lnl__vector_engine_stalls__xve_multiple_pipe_active__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_async_cs_utilization__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu1_active__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_cs_utilization__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_vs_utilization__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu1_active__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ms_utilization__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu2_active__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ts_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ts_utilization__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ps_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ps_utilization__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_async_cs_utilization__read \
    lnl__vector_engine_profile__xve_multiple_pipe_active__read
#define ptl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_cs_utilization__read \
    lnl__vector_engine_profile__xve_pipe_alu0_and_alu1_active__read
double
ptl__xve_pipeline_rasterization_profile__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                                         const struct intel_xe_perf_metric_set *metric_set,
                                                                         uint64_t *accumulator);
#define ptl__xve_pipeline_rasterization_profile__xve_stall_aluwr__read \
    lnl__compute_basic__xve_stall__read
#define ptl__xve_pipeline_rasterization_profile__xve_stall_barrier__read \
    lnl__render_basic__xve_active__read
#define ptl__xve_pipeline_rasterization_profile__xve_stall_control__read \
    lnl__render_basic__xve_inst_executed_alu0_all_utilization__read
#define ptl__xve_pipeline_rasterization_profile__xve_stall_instfetch__read \
    lnl__render_basic__xve_inst_executed_alu1_all_utilization__read
#define ptl__xve_pipeline_rasterization_profile__xve_stall_other__read \
    lnl__render_basic__xve_shared_function_access_hold__read
#define ptl__xve_pipeline_rasterization_profile__xve_stall_pipestall__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_ps_dependency__read
#define ptl__xve_pipeline_rasterization_profile__xve_stall_ps_dependency__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_sbid__read
#define ptl__xve_pipeline_rasterization_profile__xve_stall_sbid__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_sendwr__read
#define ptl__xve_pipeline_rasterization_profile__xve_stall_sendwr__read \
    lnl__vector_engine_stalls__xve_active__read
#define ptl__xve_pipeline_raytracing_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__xve_pipeline_raytracing_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__xve_pipeline_raytracing_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__xve_pipeline_raytracing_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__xve_pipeline_raytracing_profile__xve_active__read \
    lnl__xve_pipeline_rasterization_profile__xve_active__read
#define ptl__xve_pipeline_raytracing_profile__xve_stall__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_all_utilization__read \
    lnl__vector_engine_stalls__xve_stall_aluwr__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_all_utilization__read \
    lnl__vector_engine_stalls__xve_stall_barrier__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu2_all_utilization__read \
    lnl__compute_basic__xve_active__read
#define ptl__xve_pipeline_raytracing_profile__xve_pipe_alu0_and_alu1_active__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
#define ptl__xve_pipeline_raytracing_profile__xve_pipe_alu0_and_alu2_active__read \
    lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read
#define ptl__xve_pipeline_raytracing_profile__xve_multiple_pipe_active__read \
    lnl__vector_engine_stalls__xve_stall_pipestall__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_rt_ahs_utilization__read \
    lnl__vector_engine_stalls__xve_shared_function_access_hold__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_rt_chs_utilization__read \
    lnl__vector_engine_stalls__xve_stall__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_rt_ms_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ts_utilization__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_ps_utilization__read \
    lnl__vector_engine_stalls__xve_multiple_pipe_active__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_async_cs_utilization__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu1_active__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu0_cs_utilization__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_rt_ahs_utilization__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu1_active__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_rt_chs_utilization__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu2_active__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_rt_ms_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ts_utilization__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_ps_utilization__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu1_ps_utilization__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_async_cs_utilization__read \
    lnl__vector_engine_profile__xve_multiple_pipe_active__read
#define ptl__xve_pipeline_raytracing_profile__xve_inst_executed_alu1_cs_utilization__read \
    lnl__vector_engine_profile__xve_pipe_alu0_and_alu1_active__read
#define ptl__xve_pipeline_raytracing_profile__xve_threads_occupancy_all__read \
    ptl__xve_pipeline_rasterization_profile__xve_threads_occupancy_all__read
#define ptl__xve_pipeline_raytracing_profile__xve_stall_aluwr__read \
    lnl__compute_basic__xve_stall__read
#define ptl__xve_pipeline_raytracing_profile__xve_stall_barrier__read \
    lnl__render_basic__xve_active__read
#define ptl__xve_pipeline_raytracing_profile__xve_stall_control__read \
    lnl__render_basic__xve_inst_executed_alu0_all_utilization__read
#define ptl__xve_pipeline_raytracing_profile__xve_stall_instfetch__read \
    lnl__render_basic__xve_inst_executed_alu1_all_utilization__read
#define ptl__xve_pipeline_raytracing_profile__xve_stall_other__read \
    lnl__render_basic__xve_shared_function_access_hold__read
#define ptl__xve_pipeline_raytracing_profile__xve_stall_pipestall__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_ps_dependency__read
#define ptl__xve_pipeline_raytracing_profile__xve_stall_ps_dependency__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_sbid__read
#define ptl__xve_pipeline_raytracing_profile__xve_stall_sbid__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_sendwr__read
#define ptl__xve_pipeline_raytracing_profile__xve_stall_sendwr__read \
    lnl__vector_engine_stalls__xve_active__read
#define ptl__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__test_oa__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define ptl__test_oa__ia_vertex__read \
    lnl__render_basic__ia_vertex__read
#define ptl__test_oa__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define ptl__test_oa__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define ptl__test_oa__rasterizer_sample_output__read \
    lnl__render_basic__rasterizer_sample_output__read
#define ptl__test_oa__test_event1__read \
    lnl__render_pipe_profile__ps_output_available__read
#define ptl__test_oa__test_event1_cycles__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define ptl__test_oa__test_event1_cycles_xecore0__read \
    lnl__render_basic__shader_pix_kill__read
#define ptl__test_oa__test_event1_cycles_xecore1__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define ptl__test_oa__test_event1_cycles_xecore2__read \
    lnl__render_basic__sampler_2_x2_read__read
#define ptl__test_oa__test_event1_cycles_xecore3__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define ptl__test_oa__test_event1_cycles_xecore4__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define ptl__test_oa__test_event1_cycles_xecore5__read \
    lnl__render_basic__icache_hit__read
#define ptl__test_oa__test_event1_cycles_xecore6__read \
    lnl__render_basic__icache_miss__read
#define ptl__test_oa__test_event1_cycles_xecore7__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define ptl__test_oa__test_event1_cycles_xecore8__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define ptl__test_oa__test_event1_cycles_xecore9__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define ptl__test_oa__test_event1_cycles_xecore10__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define ptl__test_oa__test_event1_cycles_xecore11__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define ptl__test_oa__test_event1_cycles_average__read \
    lnl__test_oa__test_event1_cycles_average__read
#define ptl__test_oa__test_event2__read \
    lnl__test_oa__test_event2__read
#define ptl__test_oa__test_event2_cycles__read \
    lnl__render_basic__pixel_blend__read
#define ptl__media_set2__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__media_set2__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__media_set2__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__media_set2__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__media_set2__command_parser_video_enhancement_engine0_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define ptl__media_set2__video_enhancement_box0_read_request__read \
    tglgt1__render_basic__vs_threads__read
#define ptl__media_set2__video_enhancement_box0_write_request__read \
    tglgt1__render_basic__hs_threads__read
#define ptl__media_set2__command_parser_video_enhancement_engine1_busy__read \
    lnl__media_set2__command_parser_video_enhancement_engine1_busy__read
#define ptl__media_set2__video_enhancement_box1_read_request__read \
    tglgt1__render_basic__cs_threads__read
#define ptl__media_set2__video_enhancement_box1_write_request__read \
    tglgt1__render_basic__gs_threads__read
#define ptl__media_set1__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define ptl__media_set1__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define ptl__media_set1__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define ptl__media_set1__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define ptl__media_set1__command_parser_graphics_security_controller_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define cri__compute_basic__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define cri__compute_basic__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define cri__compute_basic__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define cri__compute_basic__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define cri__compute_basic__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define cri__compute_basic__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define cri__compute_basic__icache_hit__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define cri__compute_basic__icache_miss__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define cri__compute_basic__xve_active__read \
    lnl__vector_engine_stalls__xve_stall_barrier__read
#define cri__compute_basic__xve_inst_executed_alu0_all__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define cri__compute_basic__xve_inst_executed_alu1_all__read \
    lnl__render_basic__sampler_2_x2_read__read
#define cri__compute_basic__xve_inst_executed_send_all__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define cri__compute_basic__xve_inst_issued_all__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define cri__compute_basic__xve_shared_function_access_hold__read \
    lnl__compute_basic__xve_shared_function_access_hold__read
#define cri__compute_basic__xve_stall__read \
    lnl__compute_basic__xve_stall__read
#define cri__compute_basic__xve_threads_occupancy_all__read \
    ptl__compute_basic__xve_threads_occupancy_all__read
#define cri__compute_basic__xve_inst_executed_alu2_all__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define cri__compute_basic__xve_multiple_pipe_active__read \
    lnl__render_basic__xve_inst_executed_alu1_all_utilization__read
#define cri__compute_basic__load_store_cache_partial_write_count__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define cri__compute_basic__slm_bank_conflict_count__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define cri__compute_basic__slm_byte_read__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define cri__compute_basic__slm_byte_write__read \
    lnl__render_basic__load_store_cache_hit__read
#define cri__compute_basic__load_store_cache_byte_read__read \
    lnl__render_basic__load_store_cache_access__read
#define cri__compute_basic__load_store_cache_byte_write__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define cri__compute_basic__load_store_cache_access__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define cri__compute_basic__load_store_cache_hit__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define cri__compute_basic__async_gpgpu_thread_exit_count__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
double
cri__compute_basic__gpgpu_dispatch__read(const struct intel_xe_perf *perf,
                                         const struct intel_xe_perf_metric_set *metric_set,
                                         uint64_t *accumulator);
double
cri__compute_basic__command_parser_compute_engine_busy__read(const struct intel_xe_perf *perf,
                                                             const struct intel_xe_perf_metric_set *metric_set,
                                                             uint64_t *accumulator);
#define cri__compute_basic__command_parser_compute_engine_dispatch_kernel_count__read \
    lnl__render_basic__rasterizer_sample_output__read
double
cri__compute_basic__command_parser_copy_engine_busy__read(const struct intel_xe_perf *perf,
                                                          const struct intel_xe_perf_metric_set *metric_set,
                                                          uint64_t *accumulator);
#define cri__compute_basic__command_parser_flush_count__read \
    lnl__render_basic__pixel_write__read
#define cri__compute_basic__xve_pipe_alu0_and_alu1_active__read \
    lnl__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read
#define cri__compute_basic__xve_pipe_alu0_and_alu2_active__read \
    lnl__compute_basic__xve_pipe_alu0_and_alu1_active__read
#define cri__compute_basic__xve_inst_executed_alu0_all_utilization__read \
    lnl__compute_basic__xve_active__read
#define cri__compute_basic__xve_inst_executed_alu1_all_utilization__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
double
cri__compute_basic__xve_inst_executed_alu2_all_utilization__read(const struct intel_xe_perf *perf,
                                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                                 uint64_t *accumulator);
#define cri__compute_basic__xve_inst_executed_barrier__read \
    lnl__rt_profile__xve_inst_executed_alu1_rt_ms__read
#define cri__compute_basic__copy_engine_read_request__read \
    lnl__render_basic__l3_read__read
double
cri__compute_basic__copy_engine_request_stall__read(const struct intel_xe_perf *perf,
                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                    uint64_t *accumulator);
#define cri__compute_basic__copy_engine_write_request__read \
    lnl__compute_basic__l3_write__read
#define cri__compute_basic__gpu_memory_byte_read__read \
    lnl__depth_profile__hiz_depth_test_fail_p__read
#define cri__compute_basic__gpu_memory_byte_write__read \
    lnl__compute_basic__compressor_input__read
#define cri__compute_basic__gpu_memory_active__read \
    lnl__vector_engine_profile__l3_stall__read
#define cri__compute_basic__gpu_memory_read__read \
    lnl__render_basic__clipper_primitive_cull__read
#define cri__compute_basic__gpu_memory_write__read \
    lnl__render_basic__clipper_primitive_far_near_clip__read
#define cri__compute_basic__tlb_miss__read \
    lnl__render_basic__clipper_primitive_output__read
#define cri__compute_basic__tlb_page_size_1_g__read \
    lnl__render_basic__ia_primitive__read
#define cri__compute_basic__tlb_page_size_2_m__read \
    lnl__render_basic__streamout_output_vertex_count__read
#define cri__compute_basic__tlb_page_size_4_k__read \
    lnl__render_basic__stripsfan_object_count__read
#define cri__compute_basic__tlb_page_size_64_k__read \
    lnl__render_basic__stripsfan_object_cull__read
#define cri__compute_basic__compressor_input__read \
    lnl__render_basic__streamout_primitive_write_count__read
#define cri__compute_basic__compressor_output__read \
    lnl__render_basic__compressor_input__read
#define cri__compute_basic__l3_read__read \
    lnl__render_basic__compressor_output__read
#define cri__compute_basic__l3_write__read \
    lnl__render_basic__tlb_miss__read
uint64_t
cri__compute_basic__l3_byte_read__read(const struct intel_xe_perf *perf,
                                       const struct intel_xe_perf_metric_set *metric_set,
                                       uint64_t *accumulator);
uint64_t
cri__compute_basic__l3_byte_write__read(const struct intel_xe_perf *perf,
                                        const struct intel_xe_perf_metric_set *metric_set,
                                        uint64_t *accumulator);
#define cri__compute_basic__l3_atomic_access__read \
    lnl__compute_basic__command_parser_render_engine_dispatch_kernel_count__read
#define cri__compute_basic__l3_hit__read \
    lnl__render_basic__urb_read__read
#define cri__compute_basic__l3_miss__read \
    lnl__render_basic__urb_write__read
double
cri__compute_basic__l3_superq_full__read(const struct intel_xe_perf *perf,
                                         const struct intel_xe_perf_metric_set *metric_set,
                                         uint64_t *accumulator);
#define cri__compute_basic__xve_inst_executed_alu3_all__read \
    lnl__render_basic__xve_inst_issued_all__read
#define cri__compute_basic__xve_grfblock_occupancy_all__read \
    lnl__render_basic__load_store_cache_byte_read__read
#define cri__compute_basic__xve_inst_lane_enabled__read \
    lnl__render_basic__load_store_cache_byte_write__read
#define cri__compute_basic__xve_inst_lane_total__read \
    lnl__render_basic__slm_byte_read__read
#define cri__compute_basic__xve_op_fp32__read \
    lnl__render_basic__slm_byte_write__read
#define cri__compute_basic__xve_op_fp64__read \
    ptl__rt_profile__rt_stoc_hit_transparent__read
#define cri__l1_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define cri__l1_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define cri__l1_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define cri__l1_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define cri__l1_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define cri__l1_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define cri__l1_profile__load_store_cache_access__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define cri__l1_profile__load_store_cache_byte_read__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define cri__l1_profile__load_store_cache_byte_write__read \
    lnl__render_basic__shader_pix_kill__read
#define cri__l1_profile__load_store_cache_hit__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define cri__l1_profile__load_store_cache_input_available__read \
    lnl__render_pipe_profile__sampler_memory_latency_stall__read
uint64_t
cri__l1_profile__load_store_cache_number_of_bank_access_count__read(const struct intel_xe_perf *perf,
                                                                    const struct intel_xe_perf_metric_set *metric_set,
                                                                    uint64_t *accumulator);
double
cri__l1_profile__load_store_cache_output_ready__read(const struct intel_xe_perf *perf,
                                                     const struct intel_xe_perf_metric_set *metric_set,
                                                     uint64_t *accumulator);
#define cri__l1_profile__load_store_cache_partial_write_count__read \
    lnl__render_basic__icache_hit__read
#define cri__l1_profile__slm_access_count__read \
    lnl__render_basic__icache_miss__read
#define cri__l1_profile__slm_bank_conflict_count__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define cri__l1_profile__slm_byte_read__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define cri__l1_profile__slm_byte_write__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define cri__l1_profile__xve_load_store_cache_atomic_message_count__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define cri__l1_profile__xve_load_store_cache_fence_message_count__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define cri__l1_profile__xve_load_store_cache_read_message_count__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define cri__l1_profile__xve_load_store_cache_register_request_count__read \
    lnl__render_basic__load_store_cache_hit__read
#define cri__l1_profile__xve_load_store_cache_register_response_count__read \
    lnl__render_basic__load_store_cache_access__read
#define cri__l1_profile__xve_load_store_cache_write_message_count__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define cri__l1_profile__xve_slm_atomic_message_count__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define cri__l1_profile__xve_slm_fence_message_count__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define cri__l1_profile__xve_slm_read_message_count__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define cri__l1_profile__xve_slm_write_message_count__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define cri__l1_profile__slm_atomic_access_count__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define cri__l1_profile__slm_overlapped_atomic_access_count__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
#define cri__l1_profile__global_overlapped_atomic_access_count__read \
    lnl__rt_profile__xve_inst_executed_alu1_rt_ms__read
#define cri__l1_profile__icache_l3_hit__read \
    lnl__render_basic__ia_vertex__read
#define cri__l1_profile__icache_l3_read__read \
    lnl__render_basic__rasterizer_sample_output__read
double
cri__l1_profile__l3_busy__read(const struct intel_xe_perf *perf,
                               const struct intel_xe_perf_metric_set *metric_set,
                               uint64_t *accumulator);
#define cri__l1_profile__l3_input_available__read \
    lnl__vector_engine_profile__l3_busy__read
double
cri__l1_profile__l3_output_ready__read(const struct intel_xe_perf *perf,
                                       const struct intel_xe_perf_metric_set *metric_set,
                                       uint64_t *accumulator);
#define cri__l1_profile__l3_stall__read \
    lnl__vector_engine_profile__l3_input_available__read
#define cri__l1_profile__load_store_cache_l3_hit__read \
    lnl__compute_basic__l3_write__read
#define cri__l1_profile__load_store_cache_l3_read__read \
    lnl__depth_profile__hiz_depth_test_fail_p__read
#define cri__l1_profile__load_store_cache_l3_write__read \
    lnl__compute_basic__compressor_input__read
#define cri__vector_engine_profile__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define cri__vector_engine_profile__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define cri__vector_engine_profile__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define cri__vector_engine_profile__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define cri__vector_engine_profile__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define cri__vector_engine_profile__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define cri__vector_engine_profile__icache_hit__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define cri__vector_engine_profile__icache_miss__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define cri__vector_engine_profile__xve_inst_executed_alu0_all__read \
    lnl__render_basic__shader_pix_kill__read
#define cri__vector_engine_profile__xve_inst_executed_alu1_all__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define cri__vector_engine_profile__xve_inst_executed_alu2_all__read \
    lnl__render_basic__sampler_2_x2_read__read
#define cri__vector_engine_profile__xve_inst_executed_barrier__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define cri__vector_engine_profile__xve_inst_executed_bitconv__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define cri__vector_engine_profile__xve_inst_executed_control_all__read \
    lnl__render_basic__icache_hit__read
#define cri__vector_engine_profile__xve_inst_executed_fp16__read \
    lnl__render_basic__icache_miss__read
#define cri__vector_engine_profile__xve_inst_executed_fp32__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define cri__vector_engine_profile__xve_inst_executed_fp64__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define cri__vector_engine_profile__xve_inst_executed_fp64_2_nd__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define cri__vector_engine_profile__xve_inst_executed_int16__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define cri__vector_engine_profile__xve_inst_executed_int32__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define cri__vector_engine_profile__xve_inst_executed_int64__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define cri__vector_engine_profile__xve_inst_executed_math__read \
    lnl__render_basic__load_store_cache_hit__read
#define cri__vector_engine_profile__xve_inst_executed_nondivergent__read \
    lnl__render_basic__load_store_cache_access__read
#define cri__vector_engine_profile__xve_inst_executed_predication__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define cri__vector_engine_profile__xve_inst_executed_send_all__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define cri__vector_engine_profile__xve_inst_executed_xmx_bf16__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define cri__vector_engine_profile__xve_inst_executed_xmx_fp16__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define cri__vector_engine_profile__xve_inst_executed_xmx_int4__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define cri__vector_engine_profile__xve_inst_executed_xmx_int8__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define cri__vector_engine_profile__xve_inst_issued_all__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
#define cri__vector_engine_profile__xve_threads_occupancy_all__read \
    ptl__render_basic__xve_threads_occupancy_all__read
#define cri__vector_engine_profile__command_parser_compute_engine_busy__read \
    cri__compute_basic__command_parser_compute_engine_busy__read
#define cri__vector_engine_profile__command_parser_compute_engine_dispatch_kernel_count__read \
    lnl__render_basic__rasterizer_sample_output__read
#define cri__vector_engine_profile__xve_inst_executed_bf16__read \
    lnl__render_basic__xve_inst_issued_all__read
#define cri__vector_engine_profile__xve_inst_executed_xmx_fp4__read \
    lnl__render_basic__load_store_cache_byte_read__read
#define cri__vector_engine_profile__xve_inst_executed_xmx_fp64__read \
    lnl__render_basic__load_store_cache_byte_write__read
#define cri__vector_engine_profile__xve_inst_executed_xmx_fp8__read \
    lnl__render_basic__slm_byte_read__read
#define cri__vector_engine_stalls__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define cri__vector_engine_stalls__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define cri__vector_engine_stalls__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define cri__vector_engine_stalls__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define cri__vector_engine_stalls__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define cri__vector_engine_stalls__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define cri__vector_engine_stalls__xve_stall_aluwr__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall__read
#define cri__vector_engine_stalls__xve_stall_barrier__read \
    lnl__vector_engine_stalls__xve_stall_aluwr__read
#define cri__vector_engine_stalls__xve_stall_control__read \
    lnl__vector_engine_stalls__xve_stall_barrier__read
#define cri__vector_engine_stalls__xve_stall_instfetch__read \
    lnl__compute_basic__xve_active__read
#define cri__vector_engine_stalls__xve_stall_other__read \
    lnl__compute_basic__xve_inst_executed_alu0_all_utilization__read
#define cri__vector_engine_stalls__xve_stall_pipestall__read \
    lnl__compute_basic__xve_inst_executed_alu1_all_utilization__read
#define cri__vector_engine_stalls__xve_stall_sbid__read \
    lnl__vector_engine_stalls__xve_stall_pipestall__read
#define cri__vector_engine_stalls__xve_stall_sendwr__read \
    lnl__compute_basic__xve_shared_function_access_hold__read
#define cri__vector_engine_stalls__thread_dispatch_queue0_active__read \
    lnl__render_pipe_profile__thread_dispatch_input_available__read
#define cri__vector_engine_stalls__thread_dispatch_queue0_stall__read \
    lnl__render_pipe_profile__thread_dispatch_ps_active__read
#define cri__vector_engine_stalls__thread_dispatch_queue1_active__read \
    lnl__render_pipe_profile__thread_dispatch_queue0_active__read
#define cri__vector_engine_stalls__thread_dispatch_queue1_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue0_stall__read
#define cri__vector_engine_stalls__threadgroup_dispatch_queue0_resource_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_active__read
#define cri__vector_engine_stalls__threadgroup_dispatch_queue1_resource_stall__read \
    lnl__render_pipe_profile__thread_dispatch_queue1_stall__read
#define cri__vector_engine_stalls__xve_active__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_sbid__read
#define cri__vector_engine_stalls__xve_shared_function_access_hold__read \
    lnl__xve_pipeline_rasterization_profile__xve_stall_sendwr__read
#define cri__vector_engine_stalls__xve_stall__read \
    lnl__vector_engine_stalls__xve_active__read
double
cri__vector_engine_stalls__xve_threads_occupancy_all__read(const struct intel_xe_perf *perf,
                                                           const struct intel_xe_perf_metric_set *metric_set,
                                                           uint64_t *accumulator);
#define cri__vector_engine_stalls__xve_multiple_pipe_active__read \
    lnl__vector_engine_stalls__xve_stall__read
#define cri__vector_engine_stalls__xve_pipe_alu0_and_alu1_active__read \
    lnl__xve_pipeline_rasterization_profile__xve_inst_executed_alu0_ts_utilization__read
#define cri__vector_engine_stalls__xve_pipe_alu0_and_alu2_active__read \
    lnl__vector_engine_stalls__xve_multiple_pipe_active__read
#define cri__vector_engine_stalls__async_gpgpu_thread_exit_count__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define cri__vector_engine_stalls__thread_dispatch_gpgpu_common_engine__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define cri__vector_engine_stalls__thread_dispatch_gpgpu_compute_engine__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
double
cri__vector_engine_stalls__thread_dispatch_input_available__read(const struct intel_xe_perf *perf,
                                                                 const struct intel_xe_perf_metric_set *metric_set,
                                                                 uint64_t *accumulator);
#define cri__vector_engine_stalls__thread_dispatch_other__read \
    lnl__render_basic__xve_inst_issued_all__read
double
cri__vector_engine_stalls__threadgroup_dispatch_queue0_input_available__read(const struct intel_xe_perf *perf,
                                                                             const struct intel_xe_perf_metric_set *metric_set,
                                                                             uint64_t *accumulator);
double
cri__vector_engine_stalls__threadgroup_dispatch_queue1_input_available__read(const struct intel_xe_perf *perf,
                                                                             const struct intel_xe_perf_metric_set *metric_set,
                                                                             uint64_t *accumulator);
#define cri__test_oa__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define cri__test_oa__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define cri__test_oa__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define cri__test_oa__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define cri__test_oa__gpu_busy__read \
    lnl__render_basic__gpu_busy__read
#define cri__test_oa__gpgpu_threadgroup_count__read \
    lnl__render_basic__gpgpu_threadgroup_count__read
#define cri__test_oa__async_gpgpu_threadgroup_count__read \
    lnl__render_basic__async_gpgpu_threadgroup_count__read
#define cri__test_oa__test_event1__read \
    lnl__render_pipe_profile__ps_output_available__read
#define cri__test_oa__test_event1_cycles__read \
    lnl__render_basic__postps_alpha_test_fail__read
#define cri__test_oa__test_event1_cycles_xecore0__read \
    lnl__render_basic__shader_pix_kill__read
#define cri__test_oa__test_event1_cycles_xecore1__read \
    lnl__render_basic__slm_bank_conflict_count__read
#define cri__test_oa__test_event1_cycles_xecore2__read \
    lnl__render_basic__sampler_2_x2_read__read
#define cri__test_oa__test_event1_cycles_xecore3__read \
    lnl__render_basic__sampler_texture_cache_access__read
#define cri__test_oa__test_event1_cycles_xecore4__read \
    lnl__render_basic__sampler_texture_cache_miss__read
#define cri__test_oa__test_event1_cycles_xecore5__read \
    lnl__render_basic__icache_hit__read
#define cri__test_oa__test_event1_cycles_xecore6__read \
    lnl__render_basic__icache_miss__read
#define cri__test_oa__test_event1_cycles_xecore7__read \
    lnl__compute_basic__xve_inst_executed_alu2_all__read
#define cri__test_oa__test_event1_cycles_xecore8__read \
    lnl__render_basic__xve_inst_executed_alu0_all__read
#define cri__test_oa__test_event1_cycles_xecore9__read \
    lnl__render_basic__xve_inst_executed_alu1_all__read
#define cri__test_oa__test_event1_cycles_xecore10__read \
    lnl__compute_basic__slm_bank_conflict_count__read
#define cri__test_oa__test_event1_cycles_xecore11__read \
    lnl__render_basic__rt_bvh_cache_miss__read
#define cri__test_oa__test_event1_cycles_xecore12__read \
    lnl__render_basic__rt_input_message_ray_count__read
#define cri__test_oa__test_event1_cycles_xecore13__read \
    lnl__render_basic__load_store_cache_hit__read
#define cri__test_oa__test_event1_cycles_xecore14__read \
    lnl__render_basic__load_store_cache_access__read
#define cri__test_oa__test_event1_cycles_xecore15__read \
    lnl__render_basic__xve_inst_executed_send_all__read
#define cri__test_oa__test_event1_cycles_xecore16__read \
    lnl__render_basic__xve_inst_executed_alu0_cs__read
#define cri__test_oa__test_event1_cycles_xecore17__read \
    lnl__render_basic__xve_inst_executed_alu0_ps__read
#define cri__test_oa__test_event1_cycles_xecore18__read \
    lnl__render_basic__xve_inst_executed_alu0_vs__read
#define cri__test_oa__test_event1_cycles_xecore19__read \
    lnl__render_basic__xve_inst_executed_alu1_cs__read
#define cri__test_oa__test_event1_cycles_xecore20__read \
    lnl__render_basic__xve_inst_executed_alu1_ps__read
#define cri__test_oa__test_event1_cycles_xecore21__read \
    lnl__render_basic__xve_inst_executed_alu1_vs__read
#define cri__test_oa__test_event1_cycles_xecore22__read \
    lnl__rt_profile__xve_inst_executed_alu1_rt_ms__read
#define cri__test_oa__test_event1_cycles_xecore23__read \
    lnl__render_basic__xve_inst_issued_all__read
#define cri__test_oa__test_event1_cycles_xecore24__read \
    lnl__render_basic__load_store_cache_byte_read__read
#define cri__test_oa__test_event1_cycles_xecore25__read \
    lnl__render_basic__load_store_cache_byte_write__read
#define cri__test_oa__test_event1_cycles_xecore26__read \
    lnl__render_basic__slm_byte_read__read
#define cri__test_oa__test_event1_cycles_xecore27__read \
    lnl__render_basic__slm_byte_write__read
#define cri__test_oa__test_event1_cycles_xecore28__read \
    ptl__rt_profile__rt_stoc_hit_transparent__read
#define cri__test_oa__test_event1_cycles_average__read \
    lnl__test_oa__test_event1_cycles_average__read
double
cri__test_oa__test_event2__read(const struct intel_xe_perf *perf,
                                const struct intel_xe_perf_metric_set *metric_set,
                                uint64_t *accumulator);
#define cri__test_oa__test_event2_cycles__read \
    lnl__render_basic__ia_vertex__read
#define cri__media_set2__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define cri__media_set2__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define cri__media_set2__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define cri__media_set2__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define cri__media_set2__command_parser_video_enhancement_engine0_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define cri__media_set2__video_enhancement_box0_read_request__read \
    tglgt1__render_basic__vs_threads__read
#define cri__media_set2__video_enhancement_box0_write_request__read \
    tglgt1__render_basic__hs_threads__read
#define cri__media_set2__command_parser_video_enhancement_engine1_busy__read \
    lnl__media_set2__command_parser_video_enhancement_engine1_busy__read
#define cri__media_set2__video_enhancement_box1_read_request__read \
    tglgt1__render_basic__cs_threads__read
#define cri__media_set2__video_enhancement_box1_write_request__read \
    tglgt1__render_basic__gs_threads__read
#define cri__media_set1__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define cri__media_set1__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define cri__media_set1__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define cri__media_set1__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define cri__media_set1__command_parser_graphics_security_controller_busy__read \
    tglgt1__render_basic__gpu_busy__read
#define cri__mert_ext_set__gpu_time__read \
    tglgt1__render_basic__gpu_time__read
#define cri__mert_ext_set__gpu_core_clocks__read \
    tglgt1__render_basic__gpu_core_clocks__read
#define cri__mert_ext_set__avg_gpu_core_frequency__read \
    tglgt1__render_basic__avg_gpu_core_frequency__read
#define cri__mert_ext_set__avg_gpu_core_frequency__max \
    tglgt1__render_basic__avg_gpu_core_frequency__max

#define cri__mert_ext_set__host_to_gpumem_transaction_read__read \
    lnl__media_set1__media_read_request__read
#define cri__mert_ext_set__host_to_gpumem_transaction_write__read \
    tglgt1__render_basic__vs_threads__read
#define cri__mert_ext_set__sysmem_transaction_read__read \
    tglgt1__render_basic__hs_threads__read
#define cri__mert_ext_set__sysmem_transaction_write__read \
    tglgt1__render_basic__ds_threads__read

#endif /* __XE_OA_EQUATIONS_H__ */
